src/arch/arm/process.hh

   1 /*
   2 * Copyright (c) 2012, 2018 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2007-2008 The Florida State University
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 #ifndef __ARM_PROCESS_HH__
  42 #define __ARM_PROCESS_HH__
  43
  44 #include <string>
  45 #include <vector>
  46
  47 #include "arch/arm/intregs.hh"
  48 #include "base/loader/object_file.hh"
  49 #include "mem/page_table.hh"
  50 #include "sim/process.hh"
  51 #include "sim/syscall_abi.hh"
  52
  53 class ArmProcess : public Process
  54 {
  55   protected:
  56     ::Loader::Arch arch;
  57     ArmProcess(ProcessParams * params, ::Loader::ObjectFile *objFile,
  58                ::Loader::Arch _arch);
  59     template<class IntType>
  60     void argsInit(int pageSize, ArmISA::IntRegIndex spIndex);
  61
  62     template<class IntType>
  63     IntType armHwcap() const
  64     {
  65         return static_cast<IntType>(armHwcapImpl());
  66     }
  67
  68     /**
  69      * AT_HWCAP is 32-bit wide on AArch64 as well so we can
  70      * safely return an uint32_t */
  71     virtual uint32_t armHwcapImpl() const = 0;
  72 };
  73
  74 class ArmProcess32 : public ArmProcess
  75 {
  76   protected:
  77     ArmProcess32(ProcessParams * params, ::Loader::ObjectFile *objFile,
  78                  ::Loader::Arch _arch);
  79
  80     void initState() override;
  81
  82     /** AArch32 AT_HWCAP */
  83     uint32_t armHwcapImpl() const override;
  84
  85   public:
  86     struct SyscallABI : public GenericSyscallABI32
  87     {
  88         static const std::vector<int> ArgumentRegs;
  89     };
  90 };
  91
  92 namespace GuestABI
  93 {
  94
  95 template <typename ABI, typename Arg>
  96 struct Argument<ABI, Arg,
  97     typename std::enable_if<
  98         std::is_base_of<ArmProcess32::SyscallABI, ABI>::value &&
  99         ABI::template IsWide<Arg>::value>::type>
 100 {
 101     static Arg
 102     get(ThreadContext *tc, typename ABI::State &state)
 103     {
 104         // 64 bit arguments are passed starting in an even register.
 105         if (state % 2)
 106             state++;
 107         panic_if(state + 1 >= ABI::ArgumentRegs.size(),
 108                 "Ran out of syscall argument registers.");
 109         auto low = ABI::ArgumentRegs[state++];
 110         auto high = ABI::ArgumentRegs[state++];
 111         return (Arg)ABI::mergeRegs(tc, low, high);
 112     }
 113 };
 114
 115 } // namespace GuestABI
 116
 117 class ArmProcess64 : public ArmProcess
 118 {
 119   protected:
 120     ArmProcess64(ProcessParams * params, ::Loader::ObjectFile *objFile,
 121                  ::Loader::Arch _arch);
 122
 123     void initState() override;
 124
 125     /** AArch64 AT_HWCAP */
 126     uint32_t armHwcapImpl() const override;
 127
 128   public:
 129     struct SyscallABI : public GenericSyscallABI64
 130     {
 131         static const std::vector<int> ArgumentRegs;
 132     };
 133 };
 134
 135 #endif // __ARM_PROCESS_HH__
 136