2 * Copyright 2015 LabWare
3 * Copyright 2014 Google Inc.
4 * Copyright (c) 2010, 2013, 2016, 2018-2019 ARM Limited
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14 * modified or unmodified, in source code or in binary form.
16 * Copyright (c) 2002-2005 The Regents of The University of Michigan
17 * All rights reserved.
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are
21 * met: redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer;
23 * redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution;
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27 * contributors may be used to endorse or promote products derived from
28 * this software without specific prior written permission.
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32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
34 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * Authors: Nathan Binkert
48 * Copyright (c) 1990, 1993 The Regents of the University of California
51 * This software was developed by the Computer Systems Engineering group
52 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
53 * contributed to Berkeley.
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56 * must display the following acknowledgement:
57 * This product includes software developed by the University of
58 * California, Lawrence Berkeley Laboratories.
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61 * modification, are permitted provided that the following conditions
63 * 1. Redistributions of source code must retain the above copyright
64 * notice, this list of conditions and the following disclaimer.
65 * 2. Redistributions in binary form must reproduce the above copyright
66 * notice, this list of conditions and the following disclaimer in the
67 * documentation and/or other materials provided with the distribution.
68 * 3. All advertising materials mentioning features or use of this software
69 * must display the following acknowledgement:
70 * This product includes software developed by the University of
71 * California, Berkeley and its contributors.
72 * 4. Neither the name of the University nor the names of its contributors
73 * may be used to endorse or promote products derived from this software
74 * without specific prior written permission.
76 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
79 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
88 * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
92 * Copyright (c) 2001 The NetBSD Foundation, Inc.
93 * All rights reserved.
95 * This code is derived from software contributed to The NetBSD Foundation
98 * Redistribution and use in source and binary forms, with or without
99 * modification, are permitted provided that the following conditions
101 * 1. Redistributions of source code must retain the above copyright
102 * notice, this list of conditions and the following disclaimer.
103 * 2. Redistributions in binary form must reproduce the above copyright
104 * notice, this list of conditions and the following disclaimer in the
105 * documentation and/or other materials provided with the distribution.
106 * 3. All advertising materials mentioning features or use of this software
107 * must display the following acknowledgement:
108 * This product includes software developed by the NetBSD
109 * Foundation, Inc. and its contributors.
110 * 4. Neither the name of The NetBSD Foundation nor the names of its
111 * contributors may be used to endorse or promote products derived
112 * from this software without specific prior written permission.
114 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
115 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
116 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
117 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
118 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
119 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
120 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
121 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
122 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
123 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
124 * POSSIBILITY OF SUCH DAMAGE.
128 * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
132 * "Stub" to allow remote cpu to debug over a serial line using gdb.
135 #include "arch/arm/remote_gdb.hh"
137 #include <sys/signal.h>
142 #include "arch/arm/decoder.hh"
143 #include "arch/arm/pagetable.hh"
144 #include "arch/arm/registers.hh"
145 #include "arch/arm/system.hh"
146 #include "arch/arm/utility.hh"
147 #include "arch/arm/vtophys.hh"
148 #include "base/chunk_generator.hh"
149 #include "base/intmath.hh"
150 #include "base/remote_gdb.hh"
151 #include "base/socket.hh"
152 #include "base/trace.hh"
153 #include "blobs/gdb_xml_aarch64_core.hh"
154 #include "blobs/gdb_xml_aarch64_fpu.hh"
155 #include "blobs/gdb_xml_aarch64_target.hh"
156 #include "blobs/gdb_xml_arm_core.hh"
157 #include "blobs/gdb_xml_arm_target.hh"
158 #include "blobs/gdb_xml_arm_vfpv3.hh"
159 #include "cpu/static_inst.hh"
160 #include "cpu/thread_context.hh"
161 #include "cpu/thread_state.hh"
162 #include "debug/GDBAcc.hh"
163 #include "debug/GDBMisc.hh"
164 #include "mem/page_table.hh"
165 #include "mem/physical.hh"
166 #include "mem/port.hh"
167 #include "sim/full_system.hh"
168 #include "sim/system.hh"
171 using namespace ArmISA
;
173 RemoteGDB::RemoteGDB(System
*_system
, ThreadContext
*tc
, int _port
)
174 : BaseRemoteGDB(_system
, tc
, _port
), regCache32(this), regCache64(this)
179 * Determine if the mapping at va..(va+len) is valid.
182 RemoteGDB::acc(Addr va
, size_t len
)
185 for (ChunkGenerator
gen(va
, len
, PageBytes
); !gen
.done(); gen
.next()) {
186 if (!virtvalid(context(), gen
.addr())) {
187 DPRINTF(GDBAcc
, "acc: %#x mapping is invalid\n", va
);
192 DPRINTF(GDBAcc
, "acc: %#x mapping is valid\n", va
);
195 // Check to make sure the first byte is mapped into the processes
197 return context()->getProcessPtr()->pTable
->lookup(va
) != nullptr;
202 RemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext
*context
)
204 DPRINTF(GDBAcc
, "getRegs in remotegdb \n");
206 for (int i
= 0; i
< 31; ++i
)
207 r
.x
[i
] = context
->readIntReg(INTREG_X0
+ i
);
208 r
.spx
= context
->readIntReg(INTREG_SPX
);
209 r
.pc
= context
->pcState().pc();
210 r
.cpsr
= context
->readMiscRegNoEffect(MISCREG_CPSR
);
213 for (int i
= 0; i
< NumVecV8ArchRegs
; i
++) {
214 auto v
= (context
->readVecReg(RegId(VecRegClass
, i
))).as
<VecElem
>();
215 for (size_t j
= 0; j
< NumVecElemPerNeonVecReg
; j
++) {
220 r
.fpsr
= context
->readMiscRegNoEffect(MISCREG_FPSR
);
221 r
.fpcr
= context
->readMiscRegNoEffect(MISCREG_FPCR
);
225 RemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext
*context
) const
227 DPRINTF(GDBAcc
, "setRegs in remotegdb \n");
229 for (int i
= 0; i
< 31; ++i
)
230 context
->setIntReg(INTREG_X0
+ i
, r
.x
[i
]);
231 auto pc_state
= context
->pcState();
233 context
->pcState(pc_state
);
234 context
->setMiscRegNoEffect(MISCREG_CPSR
, r
.cpsr
);
235 // Update the stack pointer. This should be done after
236 // updating CPSR/PSTATE since that might affect how SPX gets
238 context
->setIntReg(INTREG_SPX
, r
.spx
);
241 for (int i
= 0; i
< NumVecV8ArchRegs
; i
++) {
242 auto v
= (context
->getWritableVecReg(
243 RegId(VecRegClass
, i
))).as
<VecElem
>();
244 for (size_t j
= 0; j
< NumVecElemPerNeonVecReg
; j
++) {
249 context
->setMiscRegNoEffect(MISCREG_FPSR
, r
.fpsr
);
250 context
->setMiscRegNoEffect(MISCREG_FPCR
, r
.fpcr
);
254 RemoteGDB::AArch32GdbRegCache::getRegs(ThreadContext
*context
)
256 DPRINTF(GDBAcc
, "getRegs in remotegdb \n");
258 r
.gpr
[0] = context
->readIntReg(INTREG_R0
);
259 r
.gpr
[1] = context
->readIntReg(INTREG_R1
);
260 r
.gpr
[2] = context
->readIntReg(INTREG_R2
);
261 r
.gpr
[3] = context
->readIntReg(INTREG_R3
);
262 r
.gpr
[4] = context
->readIntReg(INTREG_R4
);
263 r
.gpr
[5] = context
->readIntReg(INTREG_R5
);
264 r
.gpr
[6] = context
->readIntReg(INTREG_R6
);
265 r
.gpr
[7] = context
->readIntReg(INTREG_R7
);
266 r
.gpr
[8] = context
->readIntReg(INTREG_R8
);
267 r
.gpr
[9] = context
->readIntReg(INTREG_R9
);
268 r
.gpr
[10] = context
->readIntReg(INTREG_R10
);
269 r
.gpr
[11] = context
->readIntReg(INTREG_R11
);
270 r
.gpr
[12] = context
->readIntReg(INTREG_R12
);
271 r
.gpr
[13] = context
->readIntReg(INTREG_SP
);
272 r
.gpr
[14] = context
->readIntReg(INTREG_LR
);
273 r
.gpr
[15] = context
->pcState().pc();
274 r
.cpsr
= context
->readMiscRegNoEffect(MISCREG_CPSR
);
276 // One day somebody will implement transfer of FPRs correctly.
277 for (int i
= 0; i
< 32; i
++)
280 r
.fpscr
= context
->readMiscRegNoEffect(MISCREG_FPSCR
);
284 RemoteGDB::AArch32GdbRegCache::setRegs(ThreadContext
*context
) const
286 DPRINTF(GDBAcc
, "setRegs in remotegdb \n");
288 context
->setIntReg(INTREG_R0
, r
.gpr
[0]);
289 context
->setIntReg(INTREG_R1
, r
.gpr
[1]);
290 context
->setIntReg(INTREG_R2
, r
.gpr
[2]);
291 context
->setIntReg(INTREG_R3
, r
.gpr
[3]);
292 context
->setIntReg(INTREG_R4
, r
.gpr
[4]);
293 context
->setIntReg(INTREG_R5
, r
.gpr
[5]);
294 context
->setIntReg(INTREG_R6
, r
.gpr
[6]);
295 context
->setIntReg(INTREG_R7
, r
.gpr
[7]);
296 context
->setIntReg(INTREG_R8
, r
.gpr
[8]);
297 context
->setIntReg(INTREG_R9
, r
.gpr
[9]);
298 context
->setIntReg(INTREG_R10
, r
.gpr
[10]);
299 context
->setIntReg(INTREG_R11
, r
.gpr
[11]);
300 context
->setIntReg(INTREG_R12
, r
.gpr
[12]);
301 context
->setIntReg(INTREG_SP
, r
.gpr
[13]);
302 context
->setIntReg(INTREG_LR
, r
.gpr
[14]);
303 auto pc_state
= context
->pcState();
304 pc_state
.set(r
.gpr
[15]);
305 context
->pcState(pc_state
);
307 // One day somebody will implement transfer of FPRs correctly.
309 context
->setMiscReg(MISCREG_FPSCR
, r
.fpscr
);
310 context
->setMiscRegNoEffect(MISCREG_CPSR
, r
.cpsr
);
314 RemoteGDB::getXferFeaturesRead(const std::string
&annex
, std::string
&output
)
316 #define GDB_XML(x, s) \
317 { x, std::string(reinterpret_cast<const char *>(Blobs::s), \
319 static const std::map
<std::string
, std::string
> annexMap32
{
320 GDB_XML("target.xml", gdb_xml_arm_target
),
321 GDB_XML("arm-core.xml", gdb_xml_arm_core
),
322 GDB_XML("arm-vfpv3.xml", gdb_xml_arm_vfpv3
),
324 static const std::map
<std::string
, std::string
> annexMap64
{
325 GDB_XML("target.xml", gdb_xml_aarch64_target
),
326 GDB_XML("aarch64-core.xml", gdb_xml_aarch64_core
),
327 GDB_XML("aarch64-fpu.xml", gdb_xml_aarch64_fpu
),
330 auto& annexMap
= inAArch64(context()) ? annexMap64
: annexMap32
;
331 auto it
= annexMap
.find(annex
);
332 if (it
== annexMap
.end())
341 if (inAArch64(context()))