2 * Copyright 2015 LabWare
3 * Copyright 2014 Google Inc.
4 * Copyright (c) 2010, 2013, 2016 ARM Limited
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14 * modified or unmodified, in source code or in binary form.
16 * Copyright (c) 2002-2005 The Regents of The University of Michigan
17 * All rights reserved.
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are
21 * met: redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer;
23 * redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution;
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27 * contributors may be used to endorse or promote products derived from
28 * this software without specific prior written permission.
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32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
36 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
37 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * Authors: Nathan Binkert
48 * Copyright (c) 1990, 1993 The Regents of the University of California
51 * This software was developed by the Computer Systems Engineering group
52 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
53 * contributed to Berkeley.
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56 * must display the following acknowledgement:
57 * This product includes software developed by the University of
58 * California, Lawrence Berkeley Laboratories.
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61 * modification, are permitted provided that the following conditions
63 * 1. Redistributions of source code must retain the above copyright
64 * notice, this list of conditions and the following disclaimer.
65 * 2. Redistributions in binary form must reproduce the above copyright
66 * notice, this list of conditions and the following disclaimer in the
67 * documentation and/or other materials provided with the distribution.
68 * 3. All advertising materials mentioning features or use of this software
69 * must display the following acknowledgement:
70 * This product includes software developed by the University of
71 * California, Berkeley and its contributors.
72 * 4. Neither the name of the University nor the names of its contributors
73 * may be used to endorse or promote products derived from this software
74 * without specific prior written permission.
76 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
79 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
88 * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
92 * Copyright (c) 2001 The NetBSD Foundation, Inc.
93 * All rights reserved.
95 * This code is derived from software contributed to The NetBSD Foundation
98 * Redistribution and use in source and binary forms, with or without
99 * modification, are permitted provided that the following conditions
101 * 1. Redistributions of source code must retain the above copyright
102 * notice, this list of conditions and the following disclaimer.
103 * 2. Redistributions in binary form must reproduce the above copyright
104 * notice, this list of conditions and the following disclaimer in the
105 * documentation and/or other materials provided with the distribution.
106 * 3. All advertising materials mentioning features or use of this software
107 * must display the following acknowledgement:
108 * This product includes software developed by the NetBSD
109 * Foundation, Inc. and its contributors.
110 * 4. Neither the name of The NetBSD Foundation nor the names of its
111 * contributors may be used to endorse or promote products derived
112 * from this software without specific prior written permission.
114 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
115 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
116 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
117 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
118 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
119 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
120 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
121 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
122 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
123 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
124 * POSSIBILITY OF SUCH DAMAGE.
128 * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
132 * "Stub" to allow remote cpu to debug over a serial line using gdb.
135 #include "arch/arm/remote_gdb.hh"
137 #include <sys/signal.h>
142 #include "arch/arm/decoder.hh"
143 #include "arch/arm/pagetable.hh"
144 #include "arch/arm/registers.hh"
145 #include "arch/arm/system.hh"
146 #include "arch/arm/utility.hh"
147 #include "arch/arm/vtophys.hh"
148 #include "base/chunk_generator.hh"
149 #include "base/intmath.hh"
150 #include "base/remote_gdb.hh"
151 #include "base/socket.hh"
152 #include "base/trace.hh"
153 #include "cpu/static_inst.hh"
154 #include "cpu/thread_context.hh"
155 #include "cpu/thread_state.hh"
156 #include "debug/GDBAcc.hh"
157 #include "debug/GDBMisc.hh"
158 #include "mem/page_table.hh"
159 #include "mem/physical.hh"
160 #include "mem/port.hh"
161 #include "sim/full_system.hh"
162 #include "sim/system.hh"
165 using namespace ArmISA
;
167 RemoteGDB::RemoteGDB(System
*_system
, ThreadContext
*tc
, int _port
)
168 : BaseRemoteGDB(_system
, tc
, _port
), regCache32(this), regCache64(this)
173 * Determine if the mapping at va..(va+len) is valid.
176 RemoteGDB::acc(Addr va
, size_t len
)
179 for (ChunkGenerator
gen(va
, len
, PageBytes
); !gen
.done(); gen
.next()) {
180 if (!virtvalid(context(), gen
.addr())) {
181 DPRINTF(GDBAcc
, "acc: %#x mapping is invalid\n", va
);
186 DPRINTF(GDBAcc
, "acc: %#x mapping is valid\n", va
);
189 // Check to make sure the first byte is mapped into the processes
191 return context()->getProcessPtr()->pTable
->lookup(va
) != nullptr;
196 RemoteGDB::AArch64GdbRegCache::getRegs(ThreadContext
*context
)
198 DPRINTF(GDBAcc
, "getRegs in remotegdb \n");
200 for (int i
= 0; i
< 31; ++i
)
201 r
.x
[i
] = context
->readIntReg(INTREG_X0
+ i
);
202 r
.spx
= context
->readIntReg(INTREG_SPX
);
203 r
.pc
= context
->pcState().pc();
204 r
.cpsr
= context
->readMiscRegNoEffect(MISCREG_CPSR
);
206 for (int i
= 0; i
< 32*4; i
+= 4) {
207 r
.v
[i
+ 0] = context
->readFloatRegBits(i
+ 2);
208 r
.v
[i
+ 1] = context
->readFloatRegBits(i
+ 3);
209 r
.v
[i
+ 2] = context
->readFloatRegBits(i
+ 0);
210 r
.v
[i
+ 3] = context
->readFloatRegBits(i
+ 1);
215 RemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext
*context
) const
217 DPRINTF(GDBAcc
, "setRegs in remotegdb \n");
219 for (int i
= 0; i
< 31; ++i
)
220 context
->setIntReg(INTREG_X0
+ i
, r
.x
[i
]);
221 context
->pcState(r
.pc
);
222 context
->setMiscRegNoEffect(MISCREG_CPSR
, r
.cpsr
);
223 // Update the stack pointer. This should be done after
224 // updating CPSR/PSTATE since that might affect how SPX gets
226 context
->setIntReg(INTREG_SPX
, r
.spx
);
228 for (int i
= 0; i
< 32*4; i
+= 4) {
229 context
->setFloatRegBits(i
+ 2, r
.v
[i
+ 0]);
230 context
->setFloatRegBits(i
+ 3, r
.v
[i
+ 1]);
231 context
->setFloatRegBits(i
+ 0, r
.v
[i
+ 2]);
232 context
->setFloatRegBits(i
+ 1, r
.v
[i
+ 3]);
237 RemoteGDB::AArch32GdbRegCache::getRegs(ThreadContext
*context
)
239 DPRINTF(GDBAcc
, "getRegs in remotegdb \n");
241 r
.gpr
[0] = context
->readIntReg(INTREG_R0
);
242 r
.gpr
[1] = context
->readIntReg(INTREG_R1
);
243 r
.gpr
[2] = context
->readIntReg(INTREG_R2
);
244 r
.gpr
[3] = context
->readIntReg(INTREG_R3
);
245 r
.gpr
[4] = context
->readIntReg(INTREG_R4
);
246 r
.gpr
[5] = context
->readIntReg(INTREG_R5
);
247 r
.gpr
[6] = context
->readIntReg(INTREG_R6
);
248 r
.gpr
[7] = context
->readIntReg(INTREG_R7
);
249 r
.gpr
[8] = context
->readIntReg(INTREG_R8
);
250 r
.gpr
[9] = context
->readIntReg(INTREG_R9
);
251 r
.gpr
[10] = context
->readIntReg(INTREG_R10
);
252 r
.gpr
[11] = context
->readIntReg(INTREG_R11
);
253 r
.gpr
[12] = context
->readIntReg(INTREG_R12
);
254 r
.gpr
[13] = context
->readIntReg(INTREG_SP
);
255 r
.gpr
[14] = context
->readIntReg(INTREG_LR
);
256 r
.gpr
[15] = context
->pcState().pc();
258 // One day somebody will implement transfer of FPRs correctly.
259 for (int i
=0; i
<8*3; i
++) r
.fpr
[i
] = 0;
261 r
.fpscr
= context
->readMiscRegNoEffect(MISCREG_FPSCR
);
262 r
.cpsr
= context
->readMiscRegNoEffect(MISCREG_CPSR
);
266 RemoteGDB::AArch32GdbRegCache::setRegs(ThreadContext
*context
) const
268 DPRINTF(GDBAcc
, "setRegs in remotegdb \n");
270 context
->setIntReg(INTREG_R0
, r
.gpr
[0]);
271 context
->setIntReg(INTREG_R1
, r
.gpr
[1]);
272 context
->setIntReg(INTREG_R2
, r
.gpr
[2]);
273 context
->setIntReg(INTREG_R3
, r
.gpr
[3]);
274 context
->setIntReg(INTREG_R4
, r
.gpr
[4]);
275 context
->setIntReg(INTREG_R5
, r
.gpr
[5]);
276 context
->setIntReg(INTREG_R6
, r
.gpr
[6]);
277 context
->setIntReg(INTREG_R7
, r
.gpr
[7]);
278 context
->setIntReg(INTREG_R8
, r
.gpr
[8]);
279 context
->setIntReg(INTREG_R9
, r
.gpr
[9]);
280 context
->setIntReg(INTREG_R10
, r
.gpr
[10]);
281 context
->setIntReg(INTREG_R11
, r
.gpr
[11]);
282 context
->setIntReg(INTREG_R12
, r
.gpr
[12]);
283 context
->setIntReg(INTREG_SP
, r
.gpr
[13]);
284 context
->setIntReg(INTREG_LR
, r
.gpr
[14]);
285 context
->pcState(r
.gpr
[15]);
287 // One day somebody will implement transfer of FPRs correctly.
289 context
->setMiscReg(MISCREG_FPSCR
, r
.fpscr
);
290 context
->setMiscRegNoEffect(MISCREG_CPSR
, r
.cpsr
);
296 if (inAArch64(context()))