c5225455c5be4530fb02a4abadcad7fe20d0a3a3
[gem5.git] / src / arch / arm / stacktrace.hh
1 /*
2 * Copyright (c) 2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Ali Saidi
30 * Stephen Hines
31 */
32
33 #ifndef __ARCH_ARM_STACKTRACE_HH__
34 #define __ARCH_ARM_STACKTRACE_HH__
35
36 #include "base/trace.hh"
37 #include "config/the_isa.hh"
38 #include "cpu/static_inst.hh"
39
40 class ThreadContext;
41 class StackTrace;
42
43 namespace ArmISA
44 {
45
46 class ProcessInfo
47 {
48 private:
49 ThreadContext *tc;
50
51 int thread_info_size;
52 int task_struct_size;
53 int task_off;
54 int pid_off;
55 int name_off;
56
57 public:
58 ProcessInfo(ThreadContext *_tc);
59
60 Addr task(Addr ksp) const;
61 int pid(Addr ksp) const;
62 std::string name(Addr ksp) const;
63 };
64
65 class StackTrace
66 {
67 protected:
68 typedef TheISA::MachInst MachInst;
69 private:
70 ThreadContext *tc;
71 std::vector<Addr> stack;
72
73 private:
74 bool isEntry(Addr addr);
75 bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra);
76 bool decodeSave(MachInst inst, int &reg, int &disp);
77 bool decodeStack(MachInst inst, int &disp);
78
79 void trace(ThreadContext *tc, bool is_call);
80
81 public:
82 StackTrace();
83 StackTrace(ThreadContext *tc, StaticInstPtr inst);
84 ~StackTrace();
85
86 void clear()
87 {
88 tc = 0;
89 stack.clear();
90 }
91
92 bool valid() const { return tc != NULL; }
93 bool trace(ThreadContext *tc, StaticInstPtr inst);
94
95 public:
96 const std::vector<Addr> &getstack() const { return stack; }
97
98 static const int user = 1;
99 static const int console = 2;
100 static const int unknown = 3;
101
102 #if TRACING_ON
103 private:
104 void dump();
105
106 public:
107 void dprintf() { if (DTRACE(Stack)) dump(); }
108 #else
109 public:
110 void dprintf() {}
111 #endif
112 };
113
114 inline bool
115 StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
116 {
117 if (!inst->isCall() && !inst->isReturn())
118 return false;
119
120 if (valid())
121 clear();
122
123 trace(tc, !inst->isReturn());
124 return true;
125 }
126
127 }
128
129 #endif // __ARCH_ARM_STACKTRACE_HH__