cpu, arm: Allow the specification of a socket field
[gem5.git] / src / arch / arm / system.cc
1 /*
2 * Copyright (c) 2010, 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43 #include <iostream>
44
45 #include "arch/arm/system.hh"
46 #include "base/loader/object_file.hh"
47 #include "base/loader/symtab.hh"
48 #include "cpu/thread_context.hh"
49 #include "mem/physical.hh"
50 #include "mem/fs_translating_port_proxy.hh"
51 #include "sim/full_system.hh"
52
53 using namespace std;
54 using namespace Linux;
55
56 ArmSystem::ArmSystem(Params *p)
57 : System(p), bootldr(NULL), _haveSecurity(p->have_security),
58 _haveLPAE(p->have_lpae),
59 _haveVirtualization(p->have_virtualization),
60 _haveGenericTimer(p->have_generic_timer),
61 _highestELIs64(p->highest_el_is_64),
62 _resetAddr64(p->reset_addr_64),
63 _physAddrRange64(p->phys_addr_range_64),
64 _haveLargeAsid64(p->have_large_asid_64),
65 multiProc(p->multi_proc)
66 {
67 // Check if the physical address range is valid
68 if (_highestELIs64 && (
69 _physAddrRange64 < 32 ||
70 _physAddrRange64 > 48 ||
71 (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) {
72 fatal("Invalid physical address range (%d)\n", _physAddrRange64);
73 }
74
75 if (p->boot_loader != "") {
76 bootldr = createObjectFile(p->boot_loader);
77
78 if (!bootldr)
79 fatal("Could not read bootloader: %s\n", p->boot_loader);
80
81 if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) {
82 warn("Highest ARM exception-level set to AArch32 but bootloader "
83 "is for AArch64. Assuming you wanted these to match.\n");
84 _highestELIs64 = true;
85 } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) {
86 warn("Highest ARM exception-level set to AArch64 but bootloader "
87 "is for AArch32. Assuming you wanted these to match.\n");
88 _highestELIs64 = false;
89 }
90
91 bootldr->loadGlobalSymbols(debugSymbolTable);
92
93 }
94 debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
95 }
96
97 void
98 ArmSystem::initState()
99 {
100 // Moved from the constructor to here since it relies on the
101 // address map being resolved in the interconnect
102
103 // Call the initialisation of the super class
104 System::initState();
105
106 const Params* p = params();
107
108 if (bootldr) {
109 bootldr->loadSections(physProxy);
110
111 uint8_t jump_to_bl_32[] =
112 {
113 0x07, 0xf0, 0xa0, 0xe1 // branch to r7 in aarch32
114 };
115
116 uint8_t jump_to_bl_64[] =
117 {
118 0xe0, 0x00, 0x1f, 0xd6 // instruction "br x7" in aarch64
119 };
120
121 // write the jump to branch table into address 0
122 if (!_highestELIs64)
123 physProxy.writeBlob(0x0, jump_to_bl_32, sizeof(jump_to_bl_32));
124 else
125 physProxy.writeBlob(0x0, jump_to_bl_64, sizeof(jump_to_bl_64));
126
127 inform("Using bootloader at address %#x\n", bootldr->entryPoint());
128
129 // Put the address of the boot loader into r7 so we know
130 // where to branch to after the reset fault
131 // All other values needed by the boot loader to know what to do
132 if (!p->gic_cpu_addr || !p->flags_addr)
133 fatal("gic_cpu_addr && flags_addr must be set with bootloader\n");
134
135 for (int i = 0; i < threadContexts.size(); i++) {
136 if (!_highestELIs64)
137 threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) +
138 loadAddrOffset);
139 threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
140 threadContexts[i]->setIntReg(5, params()->flags_addr);
141 threadContexts[i]->setIntReg(7, bootldr->entryPoint());
142 }
143 inform("Using kernel entry physical address at %#x\n",
144 (kernelEntry & loadAddrMask) + loadAddrOffset);
145 } else {
146 // Set the initial PC to be at start of the kernel code
147 if (!_highestELIs64)
148 threadContexts[0]->pcState((kernelEntry & loadAddrMask) +
149 loadAddrOffset);
150 }
151 }
152
153 GenericTimer::ArchTimer *
154 ArmSystem::getArchTimer(int cpu_id) const
155 {
156 if (_genericTimer) {
157 return _genericTimer->getArchTimer(cpu_id);
158 }
159 return NULL;
160 }
161
162 GenericTimer::SystemCounter *
163 ArmSystem::getSystemCounter() const
164 {
165 if (_genericTimer) {
166 return _genericTimer->getSystemCounter();
167 }
168 return NULL;
169 }
170
171 bool
172 ArmSystem::haveSecurity(ThreadContext *tc)
173 {
174 if (!FullSystem)
175 return false;
176
177 ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
178 assert(a_sys);
179 return a_sys->haveSecurity();
180 }
181
182
183 ArmSystem::~ArmSystem()
184 {
185 if (debugPrintkEvent)
186 delete debugPrintkEvent;
187 }
188
189 bool
190 ArmSystem::haveLPAE(ThreadContext *tc)
191 {
192 if (!FullSystem)
193 return false;
194
195 ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
196 assert(a_sys);
197 return a_sys->haveLPAE();
198 }
199
200 bool
201 ArmSystem::haveVirtualization(ThreadContext *tc)
202 {
203 if (!FullSystem)
204 return false;
205
206 ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
207 assert(a_sys);
208 return a_sys->haveVirtualization();
209 }
210
211 bool
212 ArmSystem::highestELIs64(ThreadContext *tc)
213 {
214 return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestELIs64();
215 }
216
217 ExceptionLevel
218 ArmSystem::highestEL(ThreadContext *tc)
219 {
220 return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestEL();
221 }
222
223 Addr
224 ArmSystem::resetAddr64(ThreadContext *tc)
225 {
226 return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->resetAddr64();
227 }
228
229 uint8_t
230 ArmSystem::physAddrRange(ThreadContext *tc)
231 {
232 return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrRange();
233 }
234
235 Addr
236 ArmSystem::physAddrMask(ThreadContext *tc)
237 {
238 return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrMask();
239 }
240
241 bool
242 ArmSystem::haveLargeAsid64(ThreadContext *tc)
243 {
244 return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->haveLargeAsid64();
245 }
246 ArmSystem *
247 ArmSystemParams::create()
248 {
249 return new ArmSystem(this);
250 }