src/arch/arm/tracers/TarmacTrace.py

   1 # Copyright (c) 2018 ARM Limited
   2 # All rights reserved.
   3 #
   4 # The license below extends only to copyright in the software and shall
   5 # not be construed as granting a license to any other intellectual
   6 # property including but not limited to intellectual property relating
   7 # to a hardware implementation of the functionality of the software
   8 # licensed hereunder.  You may use the software subject to the license
   9 # terms below provided that you ensure that this notice is replicated
  10 # unmodified and in its entirety in all distributions of the software,
  11 # modified or unmodified, in source code or in binary form.
  12 #
  13 # Redistribution and use in source and binary forms, with or without
  14 # modification, are permitted provided that the following conditions are
  15 # met: redistributions of source code must retain the above copyright
  16 # notice, this list of conditions and the following disclaimer;
  17 # redistributions in binary form must reproduce the above copyright
  18 # notice, this list of conditions and the following disclaimer in the
  19 # documentation and/or other materials provided with the distribution;
  20 # neither the name of the copyright holders nor the names of its
  21 # contributors may be used to endorse or promote products derived from
  22 # this software without specific prior written permission.
  23 #
  24 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35 #
  36 # Authors: Giacomo Gabrielli
  37 #          Giacomo Travaglini
  38
  39 from m5.SimObject import SimObject
  40 from m5.params import *
  41 from m5.objects.InstTracer import InstTracer
  42
  43 class TarmacParser(InstTracer):
  44     type = 'TarmacParser'
  45     cxx_class = 'Trace::TarmacParser'
  46     cxx_header = "arch/arm/tracers/tarmac_parser.hh"
  47
  48     path_to_trace = Param.String("tarmac.log", "path to TARMAC trace")
  49
  50     start_pc = Param.Int(
  51         0x0, "tracing starts when the PC gets this value; ignored if 0x0")
  52
  53     exit_on_diff = Param.Bool(False,
  54         "stop simulation after first mismatch is detected")
  55
  56     exit_on_insn_diff = Param.Bool(False,
  57         "stop simulation after first mismatch on PC or opcode is detected")
  58
  59     mem_wr_check = Param.Bool(False,
  60         "enable check of memory write accesses")
  61
  62     cpu_id = Param.Bool(False,
  63         "true if trace format includes the CPU id")
  64
  65     ignore_mem_addr = Param.AddrRange(AddrRange(0, size=0),
  66         "Range of unverifiable memory addresses")
  67
  68 class TarmacTracer(InstTracer):
  69     type = 'TarmacTracer'
  70     cxx_class = 'Trace::TarmacTracer'
  71     cxx_header = "arch/arm/tracers/tarmac_tracer.hh"
  72
  73     start_tick = Param.Tick(0,
  74         "tracing starts when the tick time gets this value")
  75
  76     end_tick = Param.Tick(MaxTick,
  77         "tracing ends when the tick time gets this value")