src/arch/arm/types.hh

   1 /*
   2  * Copyright (c) 2007-2008 The Florida State University
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Stephen Hines
  29  */
  30
  31 #ifndef __ARCH_ARM_TYPES_HH__
  32 #define __ARCH_ARM_TYPES_HH__
  33
  34 #include "sim/host.hh"
  35
  36 namespace ArmISA
  37 {
  38     typedef uint32_t MachInst;
  39     typedef uint64_t ExtMachInst;
  40     typedef uint8_t  RegIndex;
  41
  42     typedef uint64_t IntReg;
  43     typedef uint64_t LargestRead;
  44     // Need to use 64 bits to make sure that read requests get handled properly
  45
  46     // floating point register file entry type
  47     typedef uint32_t FloatReg32;
  48     typedef uint64_t FloatReg64;
  49     typedef uint64_t FloatRegBits;
  50
  51     typedef double FloatRegVal;
  52     typedef double FloatReg;
  53
  54     // cop-0/cop-1 system control register
  55     typedef uint64_t MiscReg;
  56
  57     typedef union {
  58         IntReg   intreg;
  59         FloatReg fpreg;
  60         MiscReg  ctrlreg;
  61     } AnyReg;
  62
  63     typedef int RegContextParam;
  64     typedef int RegContextVal;
  65
  66     //used in FP convert & round function
  67     enum ConvertType{
  68         SINGLE_TO_DOUBLE,
  69         SINGLE_TO_WORD,
  70         SINGLE_TO_LONG,
  71
  72         DOUBLE_TO_SINGLE,
  73         DOUBLE_TO_WORD,
  74         DOUBLE_TO_LONG,
  75
  76         LONG_TO_SINGLE,
  77         LONG_TO_DOUBLE,
  78         LONG_TO_WORD,
  79         LONG_TO_PS,
  80
  81         WORD_TO_SINGLE,
  82         WORD_TO_DOUBLE,
  83         WORD_TO_LONG,
  84         WORD_TO_PS,
  85
  86         PL_TO_SINGLE,
  87         PU_TO_SINGLE
  88     };
  89
  90     //used in FP convert & round function
  91     enum RoundMode{
  92         RND_ZERO,
  93         RND_DOWN,
  94         RND_UP,
  95         RND_NEAREST
  96     };
  97
  98     enum OperatingMode {
  99         MODE_USER = 16,
 100         MODE_FIQ = 17,
 101         MODE_IRQ = 18,
 102         MODE_SVC = 19,
 103         MODE_ABORT = 23,
 104         MODE_UNDEFINED = 27,
 105         MODE_SYSTEM = 31
 106     };
 107
 108     struct CoreSpecific {
 109         // Empty for now on the ARM
 110     };
 111
 112 } // namespace ArmISA
 113
 114 #endif