src/arch/mips/MipsCPU.py

   1 # -*- mode:python -*-
   2
   3 # Copyright (c) 2007 MIPS Technologies, Inc.
   4 # All rights reserved.
   5 #
   6 # Redistribution and use in source and binary forms, with or without
   7 # modification, are permitted provided that the following conditions are
   8 # met: redistributions of source code must retain the above copyright
   9 # notice, this list of conditions and the following disclaimer;
  10 # redistributions in binary form must reproduce the above copyright
  11 # notice, this list of conditions and the following disclaimer in the
  12 # documentation and/or other materials provided with the distribution;
  13 # neither the name of the copyright holders nor the names of its
  14 # contributors may be used to endorse or promote products derived from
  15 # this software without specific prior written permission.
  16 #
  17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 #
  29 # Authors: Jaidev Patwardhan
  30 #          Korey Sewell
  31
  32 from m5.SimObject import SimObject
  33 from m5.params import *
  34 from BaseCPU import BaseCPU
  35
  36 class BaseMipsCPU(BaseCPU)
  37     if build_env['TARGET_ISA'] == 'mips':
  38         CP0_IntCtl_IPTI = Param.Unsigned(0,"No Description")
  39         CP0_IntCtl_IPPCI = Param.Unsigned(0,"No Description")
  40         CP0_SrsCtl_HSS = Param.Unsigned(0,"No Description")
  41         CP0_EBase_CPUNum = Param.Unsigned(0,"No Description")
  42         CP0_PRId_CompanyOptions = Param.Unsigned(0,"Company Options in Processor ID Register")
  43         CP0_PRId_CompanyID = Param.Unsigned(0,"Company Identifier in Processor ID Register")
  44         CP0_PRId_ProcessorID = Param.Unsigned(1,"Processor ID (0=>Not MIPS32/64 Processor, 1=>MIPS, 2-255 => Other Company")
  45         CP0_PRId_Revision = Param.Unsigned(0,"Processor Revision Number in Processor ID Register")
  46         CP0_Config_BE = Param.Unsigned(0,"Big Endian?")
  47         CP0_Config_AT = Param.Unsigned(0,"No Description")
  48         CP0_Config_AR = Param.Unsigned(0,"No Description")
  49         CP0_Config_MT = Param.Unsigned(0,"No Description")
  50         CP0_Config_VI = Param.Unsigned(0,"No Description")
  51         CP0_Config1_M = Param.Unsigned(0,"Config2 Implemented?")
  52         CP0_Config1_MMU = Param.Unsigned(0,"MMU Type")
  53         CP0_Config1_IS = Param.Unsigned(0,"No Description")
  54         CP0_Config1_IL = Param.Unsigned(0,"No Description")
  55         CP0_Config1_IA = Param.Unsigned(0,"No Description")
  56         CP0_Config1_DS = Param.Unsigned(0,"No Description")
  57         CP0_Config1_DL = Param.Unsigned(0,"No Description")
  58         CP0_Config1_DA = Param.Unsigned(0,"No Description")
  59         CP0_Config1_C2 = Param.Bool(False,"No Description")
  60         CP0_Config1_MD = Param.Bool(False,"No Description")
  61         CP0_Config1_PC = Param.Bool(False,"No Description")
  62         CP0_Config1_WR = Param.Bool(False,"No Description")
  63         CP0_Config1_CA = Param.Bool(False,"No Description")
  64         CP0_Config1_EP = Param.Bool(False,"No Description")
  65         CP0_Config1_FP = Param.Bool(False,"FPU Implemented?")
  66         CP0_Config2_M = Param.Bool(False,"Config3 Implemented?")
  67         CP0_Config2_TU = Param.Unsigned(0,"No Description")
  68         CP0_Config2_TS = Param.Unsigned(0,"No Description")
  69         CP0_Config2_TL = Param.Unsigned(0,"No Description")
  70         CP0_Config2_TA = Param.Unsigned(0,"No Description")
  71         CP0_Config2_SU = Param.Unsigned(0,"No Description")
  72         CP0_Config2_SS = Param.Unsigned(0,"No Description")
  73         CP0_Config2_SL = Param.Unsigned(0,"No Description")
  74         CP0_Config2_SA = Param.Unsigned(0,"No Description")
  75         CP0_Config3_M = Param.Bool(False,"Config4 Implemented?")
  76         CP0_Config3_DSPP = Param.Bool(False,"DSP Extensions Present?")
  77         CP0_Config3_LPA = Param.Bool(False,"No Description")
  78         CP0_Config3_VEIC = Param.Bool(False,"No Description")
  79         CP0_Config3_VInt = Param.Bool(False,"No Description")
  80         CP0_Config3_SP = Param.Bool(False,"No Description")
  81         CP0_Config3_MT = Param.Bool(False,"Multithreading Extensions Present?")
  82         CP0_Config3_SM = Param.Bool(False,"No Description")
  83         CP0_Config3_TL = Param.Bool(False,"No Description")
  84         CP0_WatchHi_M = Param.Bool(False,"No Description")
  85         CP0_PerfCtr_M = Param.Bool(False,"No Description")
  86         CP0_PerfCtr_W = Param.Bool(False,"No Description")
  87         CP0_PRId = Param.Unsigned(0,"CP0 Status Register")
  88         CP0_Config = Param.Unsigned(0,"CP0 Config Register")
  89         CP0_Config1 = Param.Unsigned(0,"CP0 Config1 Register")
  90         CP0_Config2 = Param.Unsigned(0,"CP0 Config2 Register")
  91         CP0_Config3 = Param.Unsigned(0,"CP0 Config3 Register")