62cf15d0505b7f3edf468c79c1dfbe1849849e20
[gem5.git] / src / arch / mips / SConscript
1 # -*- mode:python -*-
2
3 # Copyright (c) 2004-2006 The Regents of The University of Michigan
4 # Copyright (c) 2020 LabWare
5 # All rights reserved.
6 #
7 # Redistribution and use in source and binary forms, with or without
8 # modification, are permitted provided that the following conditions are
9 # met: redistributions of source code must retain the above copyright
10 # notice, this list of conditions and the following disclaimer;
11 # redistributions in binary form must reproduce the above copyright
12 # notice, this list of conditions and the following disclaimer in the
13 # documentation and/or other materials provided with the distribution;
14 # neither the name of the copyright holders nor the names of its
15 # contributors may be used to endorse or promote products derived from
16 # this software without specific prior written permission.
17 #
18 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
30 Import('*')
31
32 if env['TARGET_ISA'] == 'mips':
33 Source('decoder.cc')
34 Source('dsp.cc')
35 Source('faults.cc')
36 Source('idle_event.cc')
37 Source('interrupts.cc')
38 Source('isa.cc')
39 Source('linux/linux.cc')
40 Source('linux/se_workload.cc')
41 Source('mmu.cc')
42 Source('pagetable.cc')
43 Source('process.cc')
44 Source('remote_gdb.cc')
45 Source('se_workload.cc')
46 Source('tlb.cc')
47 Source('utility.cc')
48
49 SimObject('MipsInterrupts.py')
50 SimObject('MipsISA.py')
51 SimObject('MipsMMU.py')
52 SimObject('MipsSeWorkload.py')
53 SimObject('MipsTLB.py')
54
55 DebugFlag('MipsPRA')
56
57 ISADesc('isa/main.isa')
58
59 GdbXml('mips.xml', 'gdb_xml_mips')