2 * Copyright (c) 2007 MIPS Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Jaidev Patwardhan
31 #ifndef __ARCH_MIPS_DT_CONSTANTS_HH__
32 #define __ARCH_MIPS_DT_CONSTANTS_HH__
34 #include "arch/mips/types.hh"
35 #include "base/bitunion.hh"
49 Bitfield<23> mcheckep;
52 Bitfield<20, 19> iexi;
53 Bitfield<19> ddbsImpr;
54 Bitfield<18> ddblImpr;
55 SubBitUnion(ejtagVer, 17, 15)
56 Bitfield<17> ejtagVer2;
57 Bitfield<16> ejtagVer1;
58 Bitfield<15> ejtagVer0;
59 EndSubBitUnion(ejtagVer)
60 Bitfield<14, 10> dexcCode;
73 BitUnion32(TraceControlReg)
83 Bitfield<20, 13> asidM;
90 EndBitUnion(TraceControlReg)
92 BitUnion32(TraceControl2Reg)
94 Bitfield<28, 21> cpuid;
96 Bitfield<19, 12> tcnum;
98 Bitfield<6, 5> validModes;
102 EndBitUnion(TraceControl2Reg)
104 BitUnion32(TraceBPCReg)
108 Bitfield<26, 24> bpc8;
109 Bitfield<23, 21> bpc7;
110 Bitfield<20, 18> bpc6;
111 Bitfield<17, 15> bpc5;
112 Bitfield<14, 12> bpc4;
113 Bitfield<11, 9> bpc3;
117 EndBitUnion(TraceBPCReg)
119 BitUnion32(TraceBPC2Reg)
120 Bitfield<17, 15> bpc14;
121 Bitfield<14, 12> bpc13;
122 Bitfield<11, 9> bpc12;
123 Bitfield<8, 6> bpc11;
124 Bitfield<5, 3> bpc10;
126 EndBitUnion(TraceBPC2Reg)
128 BitUnion32(Debug2Reg)
133 EndBitUnion(Debug2Reg)
134 } // namespace MipsISA