2 * Copyright (c) 2007 MIPS Technologies, Inc.
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14 * this software without specific prior written permission.
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29 #ifndef __ARCH_MIPS_DT_CONSTANTS_HH__
30 #define __ARCH_MIPS_DT_CONSTANTS_HH__
32 #include "arch/mips/types.hh"
33 #include "base/bitunion.hh"
47 Bitfield<23> mcheckep;
50 Bitfield<20, 19> iexi;
51 Bitfield<19> ddbsImpr;
52 Bitfield<18> ddblImpr;
53 SubBitUnion(ejtagVer, 17, 15)
54 Bitfield<17> ejtagVer2;
55 Bitfield<16> ejtagVer1;
56 Bitfield<15> ejtagVer0;
57 EndSubBitUnion(ejtagVer)
58 Bitfield<14, 10> dexcCode;
71 BitUnion32(TraceControlReg)
81 Bitfield<20, 13> asidM;
88 EndBitUnion(TraceControlReg)
90 BitUnion32(TraceControl2Reg)
92 Bitfield<28, 21> cpuid;
94 Bitfield<19, 12> tcnum;
96 Bitfield<6, 5> validModes;
100 EndBitUnion(TraceControl2Reg)
102 BitUnion32(TraceBPCReg)
106 Bitfield<26, 24> bpc8;
107 Bitfield<23, 21> bpc7;
108 Bitfield<20, 18> bpc6;
109 Bitfield<17, 15> bpc5;
110 Bitfield<14, 12> bpc4;
111 Bitfield<11, 9> bpc3;
115 EndBitUnion(TraceBPCReg)
117 BitUnion32(TraceBPC2Reg)
118 Bitfield<17, 15> bpc14;
119 Bitfield<14, 12> bpc13;
120 Bitfield<11, 9> bpc12;
121 Bitfield<8, 6> bpc11;
122 Bitfield<5, 3> bpc10;
124 EndBitUnion(TraceBPC2Reg)
126 BitUnion32(Debug2Reg)
131 EndBitUnion(Debug2Reg)
132 } // namespace MipsISA