mips: Delete authors lists from mips files.
[gem5.git] / src / arch / mips / isa / base.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2007 MIPS Technologies, Inc.
4 // All rights reserved.
5 //
6 // Redistribution and use in source and binary forms, with or without
7 // modification, are permitted provided that the following conditions are
8 // met: redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer;
10 // redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the distribution;
13 // neither the name of the copyright holders nor the names of its
14 // contributors may be used to endorse or promote products derived from
15 // this software without specific prior written permission.
16 //
17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
29 ////////////////////////////////////////////////////////////////////
30 //
31 // Base class for MIPS instructions, and some support functions
32 //
33
34 //Outputs to decoder.hh
35 output header {{
36
37 using namespace MipsISA;
38
39 /**
40 * Base class for all MIPS static instructions.
41 */
42 class MipsStaticInst : public StaticInst
43 {
44 protected:
45
46 // Constructor
47 MipsStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
48 : StaticInst(mnem, _machInst, __opClass)
49 {
50 }
51
52 /// Print a register name for disassembly given the unique
53 /// dependence tag number (FP or int).
54 void printReg(std::ostream &os, RegId reg) const;
55
56 std::string generateDisassembly(
57 Addr pc, const SymbolTable *symtab) const override;
58
59 public:
60 void
61 advancePC(MipsISA::PCState &pc) const override
62 {
63 pc.advance();
64 }
65
66 size_t
67 asBytes(void *buf, size_t max_size) override
68 {
69 return simpleAsBytes(buf, max_size, machInst);
70 }
71 };
72
73 }};
74
75 //Ouputs to decoder.cc
76 output decoder {{
77
78 void MipsStaticInst::printReg(std::ostream &os, RegId reg) const
79 {
80 if (reg.isIntReg()) {
81 ccprintf(os, "r%d", reg.index());
82 }
83 else {
84 ccprintf(os, "f%d", reg.index());
85 }
86 }
87
88 std::string MipsStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
89 {
90 std::stringstream ss;
91
92 ccprintf(ss, "%-10s ", mnemonic);
93
94 // Need to find standard way to not print
95 // this info. Maybe add bool variable to
96 // class?
97 if (strcmp(mnemonic, "syscall") != 0) {
98 if(_numDestRegs > 0){
99 printReg(ss, _destRegIdx[0]);
100 }
101
102 if(_numSrcRegs > 0) {
103 ss << ", ";
104 printReg(ss, _srcRegIdx[0]);
105 }
106
107 if(_numSrcRegs > 1) {
108 ss << ", ";
109 printReg(ss, _srcRegIdx[1]);
110 }
111 }
112
113 // Should we define a separate inst. class
114 // just for two insts?
115 if (strcmp(mnemonic, "sll") == 0 || strcmp(mnemonic, "sra") == 0) {
116 ccprintf(ss,", %d",SA);
117 }
118
119 return ss.str();
120 }
121
122 }};
123