src/arch/mips/isa/bitfields.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2006 The Regents of The University of Michigan
   4 // All rights reserved.
   5 //
   6 // Redistribution and use in source and binary forms, with or without
   7 // modification, are permitted provided that the following conditions are
   8 // met: redistributions of source code must retain the above copyright
   9 // notice, this list of conditions and the following disclaimer;
  10 // redistributions in binary form must reproduce the above copyright
  11 // notice, this list of conditions and the following disclaimer in the
  12 // documentation and/or other materials provided with the distribution;
  13 // neither the name of the copyright holders nor the names of its
  14 // contributors may be used to endorse or promote products derived from
  15 // this software without specific prior written permission.
  16 //
  17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 //
  29 // Authors: Korey Sewell
  30
  31 ////////////////////////////////////////////////////////////////////
  32 //
  33 // Bitfield definitions.
  34 //
  35
  36 def bitfield OPCODE     <31:26>;
  37 def bitfield OPCODE_HI  <31:29>;
  38 def bitfield OPCODE_LO  <28:26>;
  39
  40 def bitfield REGIMM      <20:16>;
  41 def bitfield REGIMM_HI   <20:19>;
  42 def bitfield REGIMM_LO   <18:16>;
  43
  44 def bitfield FUNCTION      < 5: 0>;
  45 def bitfield FUNCTION_HI   < 5: 3>;
  46 def bitfield FUNCTION_LO   < 2: 0>;
  47
  48 def bitfield RS       <25:21>;
  49 def bitfield RS_MSB   <25:25>;
  50 def bitfield RS_HI    <25:24>;
  51 def bitfield RS_LO    <23:21>;
  52 def bitfield RS_SRL   <25:22>;
  53 def bitfield RS_RT    <25:16>;
  54 def bitfield RT       <20:16>;
  55 def bitfield RT_HI    <20:19>;
  56 def bitfield RT_LO    <18:16>;
  57 def bitfield RT_RD    <20:11>;
  58 def bitfield RD       <15:11>;
  59
  60 def bitfield INTIMM       <15: 0>;
  61
  62 // Floating-point operate format
  63 def bitfield FMT      <25:21>;
  64 def bitfield FR       <25:21>;
  65 def bitfield FT       <20:16>;
  66 def bitfield FS       <15:11>;
  67 def bitfield FD       <10:6>;
  68
  69 def bitfield ND       <17:17>;
  70 def bitfield TF       <16:16>;
  71 def bitfield MOVCI    <16:16>;
  72 def bitfield MOVCF    <16:16>;
  73 def bitfield SRL      <21:21>;
  74 def bitfield SRLV     < 6: 6>;
  75 def bitfield SA       <10: 6>;
  76
  77 // Floating Point Condition Codes
  78 def bitfield CC <10:8>;
  79 def bitfield BRANCH_CC <20:18>;
  80
  81 // CP0 Register Select
  82 def bitfield SEL       < 2: 0>;
  83
  84 // Interrupts
  85 def bitfield SC       < 5: 5>;
  86
  87 // Branch format
  88 def bitfield OFFSET <15: 0>; // displacement
  89
  90 // Jmp format
  91 def bitfield JMPTARG    <25: 0>;
  92 def bitfield HINT       <10: 6>;
  93
  94 def bitfield SYSCALLCODE <25: 6>;
  95 def bitfield TRAPCODE    <15:13>;
  96
  97 // EXT/INS instructions
  98 def bitfield MSB        <15:11>;
  99 def bitfield LSB        <10: 6>;
 100
 101 // M5 instructions
 102 def bitfield M5FUNC <7:0>;