misc: string.join has been removed in python3
[gem5.git] / src / arch / mips / isa / bitfields.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2007 MIPS Technologies, Inc.
4 // All rights reserved.
5 //
6 // Redistribution and use in source and binary forms, with or without
7 // modification, are permitted provided that the following conditions are
8 // met: redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer;
10 // redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the distribution;
13 // neither the name of the copyright holders nor the names of its
14 // contributors may be used to endorse or promote products derived from
15 // this software without specific prior written permission.
16 //
17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
29 ////////////////////////////////////////////////////////////////////
30 //
31 // Bitfield definitions.
32 //
33
34 def bitfield OPCODE <31:26>;
35 def bitfield OPCODE_HI <31:29>;
36 def bitfield OPCODE_LO <28:26>;
37
38 def bitfield REGIMM <20:16>;
39 def bitfield REGIMM_HI <20:19>;
40 def bitfield REGIMM_LO <18:16>;
41
42 def bitfield FUNCTION < 5: 0>;
43 def bitfield FUNCTION_HI < 5: 3>;
44 def bitfield FUNCTION_LO < 2: 0>;
45
46 def bitfield RS <25:21>;
47 def bitfield RS_MSB <25:25>;
48 def bitfield RS_HI <25:24>;
49 def bitfield RS_LO <23:21>;
50 def bitfield RS_SRL <25:22>;
51 def bitfield RS_RT <25:16>;
52 def bitfield RT <20:16>;
53 def bitfield RT_HI <20:19>;
54 def bitfield RT_LO <18:16>;
55 def bitfield RT_RD <20:11>;
56 def bitfield RD <15:11>;
57
58 def bitfield INTIMM <15: 0>;
59 def bitfield RS_RT_INTIMM <25: 0>;
60
61 // Floating-point operate format
62 def bitfield FMT <25:21>;
63 def bitfield FR <25:21>;
64 def bitfield FT <20:16>;
65 def bitfield FS <15:11>;
66 def bitfield FD <10:6>;
67
68 def bitfield ND <17:17>;
69 def bitfield TF <16:16>;
70 def bitfield MOVCI <16:16>;
71 def bitfield MOVCF <16:16>;
72 def bitfield SRL <21:21>;
73 def bitfield SRLV < 6: 6>;
74 def bitfield SA <10: 6>;
75
76 // Floating Point Condition Codes
77 def bitfield CC <10:8>;
78 def bitfield BRANCH_CC <20:18>;
79
80 // CP0 Register Select
81 def bitfield SEL < 2: 0>;
82
83 // INTERRUPTS
84 def bitfield SC < 5: 5>;
85
86 // Branch format
87 def bitfield OFFSET <15: 0>; // displacement
88
89 // Jmp format
90 def bitfield JMPTARG <25: 0>;
91 def bitfield HINT <10: 6>;
92
93 def bitfield SYSCALLCODE <25: 6>;
94 def bitfield TRAPCODE <15:13>;
95
96 // EXT/INS instructions
97 def bitfield MSB <15:11>;
98 def bitfield LSB <10: 6>;
99
100 // M5 instructions
101 def bitfield M5FUNC <7:0>;
102
103 // DSP instructions
104 def bitfield OP <10:6>;
105 def bitfield OP_HI <10:9>;
106 def bitfield OP_LO <8:6>;
107 def bitfield DSPSA <23:21>;
108 def bitfield HILOSA <25:20>;
109 def bitfield RDDSPMASK <21:16>;
110 def bitfield WRDSPMASK <16:11>;
111 def bitfield ACSRC <22:21>;
112 def bitfield ACDST <12:11>;
113 def bitfield BP <12:11>;
114
115 // MT Instructions
116 def bitfield POS <10: 6>;
117 def bitfield MT_U <5:5>;
118 def bitfield MT_H <4:4>;
119
120 //Cache Ops
121 def bitfield CACHE_OP <20:16>;