src/arch/mips/isa/bitfields.isa

   1 // -*- mode:c++ -*-
   2
   3 ////////////////////////////////////////////////////////////////////
   4 //
   5 // Bitfield definitions.
   6 //
   7
   8 def bitfield OPCODE     <31:26>;
   9 def bitfield OPCODE_HI  <31:29>;
  10 def bitfield OPCODE_LO  <28:26>;
  11
  12 def bitfield REGIMM      <20:16>;
  13 def bitfield REGIMM_HI   <20:19>;
  14 def bitfield REGIMM_LO   <18:16>;
  15
  16 def bitfield FUNCTION      < 5: 0>;
  17 def bitfield FUNCTION_HI   < 5: 3>;
  18 def bitfield FUNCTION_LO   < 2: 0>;
  19
  20 def bitfield RS       <25:21>;
  21 def bitfield RS_MSB   <25:25>;
  22 def bitfield RS_HI    <25:24>;
  23 def bitfield RS_LO    <23:21>;
  24 def bitfield RS_SRL   <25:22>;
  25 def bitfield RS_RT    <25:16>;
  26 def bitfield RT       <20:16>;
  27 def bitfield RT_HI    <20:19>;
  28 def bitfield RT_LO    <18:16>;
  29 def bitfield RT_RD    <20:11>;
  30 def bitfield RD       <15:11>;
  31
  32 def bitfield INTIMM       <15: 0>;
  33
  34 // Floating-point operate format
  35 def bitfield FMT      <25:21>;
  36 def bitfield FR       <25:21>;
  37 def bitfield FT       <20:16>;
  38 def bitfield FS       <15:11>;
  39 def bitfield FD       <10:6>;
  40
  41 def bitfield ND       <17:17>;
  42 def bitfield TF       <16:16>;
  43 def bitfield MOVCI    <16:16>;
  44 def bitfield MOVCF    <16:16>;
  45 def bitfield SRL      <21:21>;
  46 def bitfield SRLV     < 6: 6>;
  47 def bitfield SA       <10: 6>;
  48
  49 // Floating Point Condition Codes
  50 def bitfield CC <10:8>;
  51 def bitfield BRANCH_CC <20:18>;
  52
  53 // CP0 Register Select
  54 def bitfield SEL       < 2: 0>;
  55
  56 // Interrupts
  57 def bitfield SC       < 5: 5>;
  58
  59 // Branch format
  60 def bitfield OFFSET <15: 0>; // displacement
  61
  62 // Jmp format
  63 def bitfield JMPTARG    <25: 0>;
  64 def bitfield HINT       <10: 6>;
  65
  66 def bitfield SYSCALLCODE <25: 6>;
  67 def bitfield TRAPCODE    <15:13>;
  68
  69 // EXT/INS instructions
  70 def bitfield MSB        <15:11>;
  71 def bitfield LSB        <10: 6>;
  72
  73 // M5 instructions
  74 def bitfield M5FUNC <7:0>;