src/arch/mips/isa/formats/dsp.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2007 MIPS Technologies, Inc.
   4 // All rights reserved.
   5 //
   6 // Redistribution and use in source and binary forms, with or without
   7 // modification, are permitted provided that the following conditions are
   8 // met: redistributions of source code must retain the above copyright
   9 // notice, this list of conditions and the following disclaimer;
  10 // redistributions in binary form must reproduce the above copyright
  11 // notice, this list of conditions and the following disclaimer in the
  12 // documentation and/or other materials provided with the distribution;
  13 // neither the name of the copyright holders nor the names of its
  14 // contributors may be used to endorse or promote products derived from
  15 // this software without specific prior written permission.
  16 //
  17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 //
  29 // Authors: Korey Sewell
  30 //          Brett Miller
  31
  32 ////////////////////////////////////////////////////////////////////
  33 //
  34 // DSP integer operate instructions
  35 //
  36 output header {{
  37 #include <iostream>
  38     using namespace std;
  39     /**
  40      * Base class for integer operations.
  41      */
  42     class DspIntOp : public MipsStaticInst
  43     {
  44       protected:
  45
  46         /// Constructor
  47         DspIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
  48             MipsStaticInst(mnem, _machInst, __opClass)
  49         {
  50         }
  51     };
  52
  53     class DspHiLoOp : public MipsStaticInst
  54     {
  55       protected:
  56
  57         /// Constructor
  58         DspHiLoOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
  59             MipsStaticInst(mnem, _machInst, __opClass)
  60         {
  61         }
  62     };
  63 }};
  64
  65 // Dsp instruction class execute method template.
  66 def template DspExecute {{
  67         Fault %(class_name)s::execute(
  68             ExecContext *xc, Trace::InstRecord *traceData) const
  69         {
  70                 Fault fault = NoFault;
  71
  72                 %(op_decl)s;
  73
  74                 if (isDspPresent(xc))
  75                 {
  76                     if (isDspEnabled(xc))
  77                     {
  78                         %(op_rd)s;
  79                         %(code)s;
  80                     }
  81                     else
  82                     {
  83                         fault = std::make_shared<DspStateDisabledFault>();
  84                     }
  85                 }
  86                 else
  87                 {
  88                     fault = std::make_shared<ReservedInstructionFault>();
  89                 }
  90
  91                 if(fault == NoFault)
  92                 {
  93                     %(op_wb)s;
  94                 }
  95                 return fault;
  96         }
  97 }};
  98
  99 // DspHiLo instruction class execute method template.
 100 def template DspHiLoExecute {{
 101         Fault %(class_name)s::execute(
 102             ExecContext *xc, Trace::InstRecord *traceData) const
 103         {
 104                 Fault fault = NoFault;
 105
 106                 %(op_decl)s;
 107
 108                 if (isDspPresent(xc))
 109                 {
 110                     if (isDspEnabled(xc))
 111                     {
 112                         %(op_rd)s;
 113                         %(code)s;
 114                     }
 115                     else
 116                     {
 117                         fault = std::make_shared<DspStateDisabledFault>();
 118                     }
 119                 }
 120                 else
 121                 {
 122                     fault = std::make_shared<ReservedInstructionFault>();
 123                 }
 124
 125                 if(fault == NoFault)
 126                 {
 127                     %(op_wb)s;
 128                     //If there are 2 Destination Registers then
 129                     //concatenate the values for the traceData
 130                     if(traceData && _numDestRegs == 2) {
 131                         // FIXME - set the trace value correctly here
 132                         //uint64_t hilo_final_val = (uint64_t)HI_RD_SEL << 32 | LO_RD_SEL;
 133                         //traceData->setData(hilo_final_val);
 134                     }
 135                 }
 136                 return fault;
 137         }
 138 }};
 139
 140 output header {{
 141     bool isDspEnabled(ExecContext *xc);
 142
 143     bool isDspPresent(ExecContext *xc);
 144 }};
 145
 146 //Outputs to decoder.cc
 147 output decoder {{
 148 }};
 149
 150 output exec {{
 151     bool
 152     isDspEnabled(ExecContext *xc)
 153     {
 154         return !FullSystem || bits(xc->readMiscReg(MISCREG_STATUS), 24);
 155     }
 156 }};
 157
 158 output exec {{
 159     bool
 160     isDspPresent(ExecContext *xc)
 161     {
 162         return !FullSystem || bits(xc->readMiscReg(MISCREG_CONFIG3), 10);
 163     }
 164 }};
 165
 166 // add code to fetch the DSPControl register
 167 // and write it back after execution, giving
 168 // the instruction the opportunity to modify
 169 // it if necessary
 170 def format DspIntOp(code, *opt_flags) {{
 171
 172     decl_code = 'uint32_t dspctl;\n'
 173     decl_code += 'dspctl = DSPControl;\n'
 174
 175     write_code = 'DSPControl = dspctl;\n'
 176
 177     code = decl_code + code + write_code
 178
 179     opt_flags += ('IsDspOp',)
 180
 181     iop = InstObjParams(name, Name, 'DspIntOp', code, opt_flags)
 182     header_output = BasicDeclare.subst(iop)
 183     decoder_output = BasicConstructor.subst(iop)
 184     decode_block = BasicDecode.subst(iop)
 185     exec_output = DspExecute.subst(iop)
 186 }};
 187
 188 // add code to fetch the DSPControl register
 189 // and write it back after execution, giving
 190 // the instruction the opportunity to modify
 191 // it if necessary; also, fetch the appropriate
 192 // HI/LO register pair, based on the AC
 193 // instruction field.
 194
 195 def format DspHiLoOp(code, *opt_flags) {{
 196
 197     decl_code = 'int64_t dspac;\n'
 198     decl_code += 'uint32_t dspctl;\n'
 199
 200     fetch_code = 'dspctl = DSPControl;\n'
 201     fetch_code += 'dspac = HI_RD_SEL;\n'
 202     fetch_code += 'dspac = dspac << 32 | LO_RD_SEL;\n'
 203
 204     write_code = 'DSPControl = dspctl;\n'
 205     write_code += 'HI_RD_SEL = dspac<63:32>;\n'
 206     write_code += 'LO_RD_SEL = dspac<31:0>;\n'
 207
 208     code = decl_code + fetch_code + code + write_code
 209
 210     opt_flags += ('IsDspOp',)
 211
 212     iop = InstObjParams(name, Name, 'DspHiLoOp', code, opt_flags)
 213     header_output = BasicDeclare.subst(iop)
 214     decoder_output = BasicConstructor.subst(iop)
 215     decode_block = BasicDecode.subst(iop)
 216     exec_output = DspHiLoExecute.subst(iop)
 217
 218 }};
 219
 220
 221