src/arch/mips/isa/formats/dsp.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2007 MIPS Technologies, Inc.
   4 // All rights reserved.
   5 //
   6 // Redistribution and use in source and binary forms, with or without
   7 // modification, are permitted provided that the following conditions are
   8 // met: redistributions of source code must retain the above copyright
   9 // notice, this list of conditions and the following disclaimer;
  10 // redistributions in binary form must reproduce the above copyright
  11 // notice, this list of conditions and the following disclaimer in the
  12 // documentation and/or other materials provided with the distribution;
  13 // neither the name of the copyright holders nor the names of its
  14 // contributors may be used to endorse or promote products derived from
  15 // this software without specific prior written permission.
  16 //
  17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28
  29 ////////////////////////////////////////////////////////////////////
  30 //
  31 // DSP integer operate instructions
  32 //
  33 output header {{
  34 #include <iostream>
  35     using namespace std;
  36     /**
  37      * Base class for integer operations.
  38      */
  39     class DspIntOp : public MipsStaticInst
  40     {
  41       protected:
  42
  43         /// Constructor
  44         DspIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
  45             MipsStaticInst(mnem, _machInst, __opClass)
  46         {
  47         }
  48     };
  49
  50     class DspHiLoOp : public MipsStaticInst
  51     {
  52       protected:
  53
  54         /// Constructor
  55         DspHiLoOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
  56             MipsStaticInst(mnem, _machInst, __opClass)
  57         {
  58         }
  59     };
  60 }};
  61
  62 // Dsp instruction class execute method template.
  63 def template DspExecute {{
  64         Fault %(class_name)s::execute(
  65             ExecContext *xc, Trace::InstRecord *traceData) const
  66         {
  67                 Fault fault = NoFault;
  68
  69                 %(op_decl)s;
  70
  71                 if (isDspPresent(xc))
  72                 {
  73                     if (isDspEnabled(xc))
  74                     {
  75                         %(op_rd)s;
  76                         %(code)s;
  77                     }
  78                     else
  79                     {
  80                         fault = std::make_shared<DspStateDisabledFault>();
  81                     }
  82                 }
  83                 else
  84                 {
  85                     fault = std::make_shared<ReservedInstructionFault>();
  86                 }
  87
  88                 if(fault == NoFault)
  89                 {
  90                     %(op_wb)s;
  91                 }
  92                 return fault;
  93         }
  94 }};
  95
  96 // DspHiLo instruction class execute method template.
  97 def template DspHiLoExecute {{
  98         Fault %(class_name)s::execute(
  99             ExecContext *xc, Trace::InstRecord *traceData) const
 100         {
 101                 Fault fault = NoFault;
 102
 103                 %(op_decl)s;
 104
 105                 if (isDspPresent(xc))
 106                 {
 107                     if (isDspEnabled(xc))
 108                     {
 109                         %(op_rd)s;
 110                         %(code)s;
 111                     }
 112                     else
 113                     {
 114                         fault = std::make_shared<DspStateDisabledFault>();
 115                     }
 116                 }
 117                 else
 118                 {
 119                     fault = std::make_shared<ReservedInstructionFault>();
 120                 }
 121
 122                 if(fault == NoFault)
 123                 {
 124                     %(op_wb)s;
 125                     //If there are 2 Destination Registers then
 126                     //concatenate the values for the traceData
 127                     if(traceData && _numDestRegs == 2) {
 128                         // FIXME - set the trace value correctly here
 129                         //uint64_t hilo_final_val = (uint64_t)HI_RD_SEL << 32 | LO_RD_SEL;
 130                         //traceData->setData(hilo_final_val);
 131                     }
 132                 }
 133                 return fault;
 134         }
 135 }};
 136
 137 output header {{
 138     bool isDspEnabled(ExecContext *xc);
 139
 140     bool isDspPresent(ExecContext *xc);
 141 }};
 142
 143 //Outputs to decoder.cc
 144 output decoder {{
 145 }};
 146
 147 output exec {{
 148     bool
 149     isDspEnabled(ExecContext *xc)
 150     {
 151         return !FullSystem || bits(xc->readMiscReg(MISCREG_STATUS), 24);
 152     }
 153 }};
 154
 155 output exec {{
 156     bool
 157     isDspPresent(ExecContext *xc)
 158     {
 159         return !FullSystem || bits(xc->readMiscReg(MISCREG_CONFIG3), 10);
 160     }
 161 }};
 162
 163 // add code to fetch the DSPControl register
 164 // and write it back after execution, giving
 165 // the instruction the opportunity to modify
 166 // it if necessary
 167 def format DspIntOp(code, *opt_flags) {{
 168
 169     decl_code = 'uint32_t dspctl;\n'
 170     decl_code += 'dspctl = DSPControl;\n'
 171
 172     write_code = 'DSPControl = dspctl;\n'
 173
 174     code = decl_code + code + write_code
 175
 176     opt_flags += ('IsDspOp',)
 177
 178     iop = InstObjParams(name, Name, 'DspIntOp', code, opt_flags)
 179     header_output = BasicDeclare.subst(iop)
 180     decoder_output = BasicConstructor.subst(iop)
 181     decode_block = BasicDecode.subst(iop)
 182     exec_output = DspExecute.subst(iop)
 183 }};
 184
 185 // add code to fetch the DSPControl register
 186 // and write it back after execution, giving
 187 // the instruction the opportunity to modify
 188 // it if necessary; also, fetch the appropriate
 189 // HI/LO register pair, based on the AC
 190 // instruction field.
 191
 192 def format DspHiLoOp(code, *opt_flags) {{
 193
 194     decl_code = 'int64_t dspac;\n'
 195     decl_code += 'uint32_t dspctl;\n'
 196
 197     fetch_code = 'dspctl = DSPControl;\n'
 198     fetch_code += 'dspac = HI_RD_SEL;\n'
 199     fetch_code += 'dspac = dspac << 32 | LO_RD_SEL;\n'
 200
 201     write_code = 'DSPControl = dspctl;\n'
 202     write_code += 'HI_RD_SEL = dspac<63:32>;\n'
 203     write_code += 'LO_RD_SEL = dspac<31:0>;\n'
 204
 205     code = decl_code + fetch_code + code + write_code
 206
 207     opt_flags += ('IsDspOp',)
 208
 209     iop = InstObjParams(name, Name, 'DspHiLoOp', code, opt_flags)
 210     header_output = BasicDeclare.subst(iop)
 211     decoder_output = BasicConstructor.subst(iop)
 212     decode_block = BasicDecode.subst(iop)
 213     exec_output = DspHiLoExecute.subst(iop)
 214
 215 }};
 216
 217
 218