3 // Copyright (c) 2006 The Regents of The University of Michigan
4 // All rights reserved.
6 // Redistribution and use in source and binary forms, with or without
7 // modification, are permitted provided that the following conditions are
8 // met: redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer;
10 // redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the distribution;
13 // neither the name of the copyright holders nor the names of its
14 // contributors may be used to endorse or promote products derived from
15 // this software without specific prior written permission.
17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 // Authors: Korey Sewell
31 ////////////////////////////////////////////////////////////////////
33 // Integer operate instructions
39 * Base class for integer operations.
41 class IntOp : public MipsStaticInst
46 IntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
47 MipsStaticInst(mnem, _machInst, __opClass)
51 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
55 class HiLoOp: public IntOp
60 HiLoOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
61 IntOp(mnem, _machInst, __opClass)
65 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
68 class HiLoRsSelOp: public HiLoOp
73 HiLoRsSelOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
74 HiLoOp(mnem, _machInst, __opClass)
78 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
81 class HiLoRdSelOp: public HiLoOp
86 HiLoRdSelOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
87 HiLoOp(mnem, _machInst, __opClass)
91 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
94 class HiLoRdSelValOp: public HiLoOp
99 HiLoRdSelValOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
100 HiLoOp(mnem, _machInst, __opClass)
104 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
107 class IntImmOp : public MipsStaticInst
116 IntImmOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
117 MipsStaticInst(mnem, _machInst, __opClass),imm(INTIMM),
118 sextImm(INTIMM),zextImm(0x0000FFFF & INTIMM)
120 //If Bit 15 is 1 then Sign Extend
121 int32_t temp = sextImm & 0x00008000;
122 if (temp > 0 && mnemonic != "lui") {
123 sextImm |= 0xFFFF0000;
127 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
134 // HiLo instruction class execute method template.
135 def template HiLoExecute {{
136 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
138 Fault fault = NoFault;
153 // HiLoRsSel instruction class execute method template.
154 def template HiLoRsSelExecute {{
155 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
157 Fault fault = NoFault;
161 if( ACSRC > 0 && !isDspEnabled(xc) )
163 fault = new DspStateDisabledFault();
179 // HiLoRdSel instruction class execute method template.
180 def template HiLoRdSelExecute {{
181 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
183 Fault fault = NoFault;
187 if( ACDST > 0 && !isDspEnabled(xc) )
189 fault = new DspStateDisabledFault();
205 //Outputs to decoder.cc
207 std::string IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
209 std::stringstream ss;
211 ccprintf(ss, "%-10s ", mnemonic);
213 // just print the first dest... if there's a second one,
214 // it's generally implicit
215 if (_numDestRegs > 0) {
216 printReg(ss, _destRegIdx[0]);
220 // just print the first two source regs... if there's
221 // a third one, it's a read-modify-write dest (Rc),
223 if (_numSrcRegs > 0) {
224 printReg(ss, _srcRegIdx[0]);
227 if (_numSrcRegs > 1) {
229 printReg(ss, _srcRegIdx[1]);
235 std::string HiLoOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
237 std::stringstream ss;
239 ccprintf(ss, "%-10s ", mnemonic);
241 //Destination Registers are implicit for HI/LO ops
242 if (_numSrcRegs > 0) {
243 printReg(ss, _srcRegIdx[0]);
246 if (_numSrcRegs > 1) {
248 printReg(ss, _srcRegIdx[1]);
254 std::string HiLoRsSelOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
256 std::stringstream ss;
258 ccprintf(ss, "%-10s ", mnemonic);
260 if (_numDestRegs > 0 && _destRegIdx[0] < 32) {
261 printReg(ss, _destRegIdx[0]);
262 } else if (_numSrcRegs > 0 && _srcRegIdx[0] < 32) {
263 printReg(ss, _srcRegIdx[0]);
269 std::string HiLoRdSelOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
271 std::stringstream ss;
273 ccprintf(ss, "%-10s ", mnemonic);
275 if (_numDestRegs > 0 && _destRegIdx[0] < 32) {
276 printReg(ss, _destRegIdx[0]);
277 } else if (_numSrcRegs > 0 && _srcRegIdx[0] < 32) {
278 printReg(ss, _srcRegIdx[0]);
284 std::string HiLoRdSelValOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
286 std::stringstream ss;
288 ccprintf(ss, "%-10s ", mnemonic);
290 if (_numDestRegs > 0 && _destRegIdx[0] < 32) {
291 printReg(ss, _destRegIdx[0]);
292 } else if (_numSrcRegs > 0 && _srcRegIdx[0] < 32) {
293 printReg(ss, _srcRegIdx[0]);
299 std::string IntImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
301 std::stringstream ss;
303 ccprintf(ss, "%-10s ", mnemonic);
305 if (_numDestRegs > 0) {
306 printReg(ss, _destRegIdx[0]);
311 if (_numSrcRegs > 0) {
312 printReg(ss, _srcRegIdx[0]);
316 if( mnemonic == "lui")
317 ccprintf(ss, "0x%x ", sextImm);
326 def format IntOp(code, *opt_flags) {{
327 iop = InstObjParams(name, Name, 'IntOp', code, opt_flags)
328 header_output = BasicDeclare.subst(iop)
329 decoder_output = BasicConstructor.subst(iop)
330 decode_block = RegNopCheckDecode.subst(iop)
331 exec_output = BasicExecute.subst(iop)
334 def format IntImmOp(code, *opt_flags) {{
335 iop = InstObjParams(name, Name, 'IntImmOp', code, opt_flags)
336 header_output = BasicDeclare.subst(iop)
337 decoder_output = BasicConstructor.subst(iop)
338 decode_block = ImmNopCheckDecode.subst(iop)
339 exec_output = BasicExecute.subst(iop)
342 def format HiLoRsSelOp(code, *opt_flags) {{
343 iop = InstObjParams(name, Name, 'HiLoRsSelOp', code, opt_flags)
344 header_output = BasicDeclare.subst(iop)
345 decoder_output = BasicConstructor.subst(iop)
346 decode_block = BasicDecode.subst(iop)
347 exec_output = HiLoRsSelExecute.subst(iop)
350 def format HiLoRdSelOp(code, *opt_flags) {{
351 iop = InstObjParams(name, Name, 'HiLoRdSelOp', code, opt_flags)
352 header_output = BasicDeclare.subst(iop)
353 decoder_output = BasicConstructor.subst(iop)
354 decode_block = BasicDecode.subst(iop)
355 exec_output = HiLoRdSelExecute.subst(iop)
358 def format HiLoRdSelValOp(code, *opt_flags) {{
361 code = 'int64_t ' + code
363 code = 'uint64_t ' + code
365 code += 'HI_RD_SEL = val<63:32>;\n'
366 code += 'LO_RD_SEL = val<31:0>;\n'
368 iop = InstObjParams(name, Name, 'HiLoRdSelOp', code, opt_flags)
369 header_output = BasicDeclare.subst(iop)
370 decoder_output = BasicConstructor.subst(iop)
371 decode_block = BasicDecode.subst(iop)
372 exec_output = HiLoRdSelExecute.subst(iop)
375 def format HiLoOp(code, *opt_flags) {{
376 iop = InstObjParams(name, Name, 'HiLoOp', code, opt_flags)
377 header_output = BasicDeclare.subst(iop)
378 decoder_output = BasicConstructor.subst(iop)
379 decode_block = BasicDecode.subst(iop)
380 exec_output = HiLoExecute.subst(iop)