Merge zizzer:/bk/newmem
[gem5.git] / src / arch / mips / isa / formats / mt.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2006 The Regents of The University of Michigan
4 // All rights reserved.
5 //
6 // Redistribution and use in source and binary forms, with or without
7 // modification, are permitted provided that the following conditions are
8 // met: redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer;
10 // redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the distribution;
13 // neither the name of the copyright holders nor the names of its
14 // contributors may be used to endorse or promote products derived from
15 // this software without specific prior written permission.
16 //
17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 //
29 // Authors: Korey Sewell
30
31 ////////////////////////////////////////////////////////////////////
32 //
33 // MT instructions
34 //
35
36 output header {{
37 /**
38 * Base class for MIPS MT ASE operations.
39 */
40 class MT : public MipsStaticInst
41 {
42 protected:
43
44 /// Constructor
45 MT(const char *mnem, MachInst _machInst, OpClass __opClass) :
46 MipsStaticInst(mnem, _machInst, __opClass)
47 {
48 }
49
50 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
51 };
52 }};
53
54 output decoder {{
55 //Edit This Template When MT is Implemented
56 std::string MT::generateDisassembly(Addr pc, const SymbolTable *symtab) const
57 {
58 return "Disassembly of MT instruction\n";
59 }
60 }};
61
62 def template MTExecute {{
63 //Edit This Template When MT is Implemented
64 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
65 {
66 //Write the resulting state to the execution context
67 %(op_wb)s;
68
69 //Call into the trap handler with the appropriate fault
70 return No_Fault;
71 }
72 }};
73
74 // Primary format for integer operate instructions:
75 def format MipsMT() {{
76 code = 'panic(\"Mips MT Is Currently Unimplemented.\");\n'
77 iop = InstObjParams(name, Name, 'MT', code)
78 header_output = BasicDeclare.subst(iop)
79 decoder_output = BasicConstructor.subst(iop)
80 decode_block = BasicDecode.subst(iop)
81 exec_output = BasicExecute.subst(iop)
82 }};