ba8fc5c0781341a4725f79872004d88141d770b7
[gem5.git] / src / arch / mips / isa / formats / unknown.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2006 The Regents of The University of Michigan
4 // All rights reserved.
5 //
6 // Redistribution and use in source and binary forms, with or without
7 // modification, are permitted provided that the following conditions are
8 // met: redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer;
10 // redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the distribution;
13 // neither the name of the copyright holders nor the names of its
14 // contributors may be used to endorse or promote products derived from
15 // this software without specific prior written permission.
16 //
17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 //
29 // Authors: Korey Sewell
30
31 ////////////////////////////////////////////////////////////////////
32 //
33 // Unknown instructions
34 //
35
36 output header {{
37 /**
38 * Static instruction class for unknown (illegal) instructions.
39 * These cause simulator termination if they are executed in a
40 * non-speculative mode. This is a leaf class.
41 */
42 class Unknown : public MipsStaticInst
43 {
44 public:
45 /// Constructor
46 Unknown(MachInst _machInst)
47 : MipsStaticInst("unknown", _machInst, No_OpClass)
48 {
49 // don't call execute() (which panics) if we're on a
50 // speculative path
51 flags[IsNonSpeculative] = true;
52 }
53
54 %(BasicExecDeclare)s
55
56 std::string
57 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
58 };
59 }};
60
61 output decoder {{
62 std::string
63 Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) const
64 {
65 return csprintf("%-10s (inst 0x%x, opcode 0x%x, binary:%s)",
66 "unknown", machInst, OPCODE, inst2string(machInst));
67 }
68 }};
69
70 output exec {{
71 Fault
72 Unknown::execute(CPU_EXEC_CONTEXT *xc,
73 Trace::InstRecord *traceData) const
74 {
75 return new ReservedInstructionFault;
76 }
77 }};
78
79 def format Unknown() {{
80 decode_block = 'return new Unknown(machInst);\n'
81 }};
82