9dac8b571c9a1a886c1123910b4ed435049b6acb
[gem5.git] / src / arch / mips / isa / formats / util.isa
1 // -*- mode:c++ -*-
2
3 // Copyright \e.A\eN) 2007 MIPS Technologies, Inc. All Rights Reserved
4
5 // This software is part of the M5 simulator.
6
7 // THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
8 // DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
9 // TO THESE TERMS AND CONDITIONS.
10
11 // Permission is granted to use, copy, create derivative works and
12 // distribute this software and such derivative works for any purpose,
13 // so long as (1) the copyright notice above, this grant of permission,
14 // and the disclaimer below appear in all copies and derivative works
15 // made, (2) the copyright notice above is augmented as appropriate to
16 // reflect the addition of any new copyrightable work in a derivative
17 // work (e.g., Copyright \e.A\eN) <Publication Year> Copyright Owner), and (3)
18 // the name of MIPS Technologies, Inc. (\e$B!H\e(BMIPS\e$B!I\e(B) is not used in any
19 // advertising or publicity pertaining to the use or distribution of
20 // this software without specific, written prior authorization.
21
22 // THIS SOFTWARE IS PROVIDED \e$B!H\e(BAS IS.\e$B!I\e(B MIPS MAKES NO WARRANTIES AND
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24 // OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 // THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
31 // IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
32 // STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
33 // POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
34
35 //Authors: Steven K. Reinhardt
36 // Korey L. Sewell
37
38 let {{
39 def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
40 postacc_code = '', base_class = 'Memory',
41 decode_template = BasicDecode, exec_template_base = ''):
42 # Make sure flags are in lists (convert to lists if not).
43 mem_flags = makeList(mem_flags)
44 inst_flags = makeList(inst_flags)
45
46 # add hook to get effective addresses into execution trace output.
47 ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
48
49 # Some CPU models execute the memory operation as an atomic unit,
50 # while others want to separate them into an effective address
51 # computation and a memory access operation. As a result, we need
52 # to generate three StaticInst objects. Note that the latter two
53 # are nested inside the larger "atomic" one.
54
55 # Generate InstObjParams for each of the three objects. Note that
56 # they differ only in the set of code objects contained (which in
57 # turn affects the object's overall operand list).
58 iop = InstObjParams(name, Name, base_class,
59 { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
60 inst_flags)
61 ea_iop = InstObjParams(name, Name, base_class,
62 { 'ea_code':ea_code },
63 inst_flags)
64 memacc_iop = InstObjParams(name, Name, base_class,
65 { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
66 inst_flags)
67
68 if mem_flags:
69 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
70 iop.constructor += s
71 memacc_iop.constructor += s
72
73 # select templates
74
75 # The InitiateAcc template is the same for StoreCond templates as the
76 # corresponding Store template..
77 StoreCondInitiateAcc = StoreInitiateAcc
78
79 memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
80 fullExecTemplate = eval(exec_template_base + 'Execute')
81 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
82 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
83 eaCompExecuteTemplate = eval('EACompExecute')
84
85 if (exec_template_base == 'Load' or exec_template_base == 'Store'):
86 memAccSizeTemplate = eval('LoadStoreMemAccSize')
87 else:
88 memAccSizeTemplate = eval('MiscMemAccSize')
89
90 # (header_output, decoder_output, decode_block, exec_output)
91 return (LoadStoreDeclare.subst(iop),
92 EACompConstructor.subst(ea_iop)
93 + MemAccConstructor.subst(memacc_iop)
94 + LoadStoreConstructor.subst(iop),
95 decode_template.subst(iop),
96 eaCompExecuteTemplate.subst(ea_iop)
97 + memAccExecTemplate.subst(memacc_iop)
98 + fullExecTemplate.subst(iop)
99 + initiateAccTemplate.subst(iop)
100 + completeAccTemplate.subst(iop)
101 + memAccSizeTemplate.subst(memacc_iop))
102 }};
103
104 output header {{
105 std::string inst2string(MachInst machInst);
106 }};
107
108 output decoder {{
109
110 std::string inst2string(MachInst machInst)
111 {
112 string str = "";
113 uint32_t mask = 0x80000000;
114
115 for(int i=0; i < 32; i++) {
116 if ((machInst & mask) == 0) {
117 str += "0";
118 } else {
119 str += "1";
120 }
121
122 mask = mask >> 1;
123 }
124
125 return str;
126 }
127
128 }};