Registers: Add an ISA object which replaces the MiscRegFile.
[gem5.git] / src / arch / mips / isa.cc
1 /*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
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9 * redistributions in binary form must reproduce the above copyright
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11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #include "arch/mips/isa.hh"
32 #include "arch/mips/regfile/misc_regfile.hh"
33 #include "cpu/thread_context.hh"
34
35 namespace MipsISA
36 {
37
38 void
39 ISA::clear()
40 {
41 miscRegFile.clear();
42 }
43
44 MiscReg
45 ISA::readMiscRegNoEffect(int miscReg)
46 {
47 return miscRegFile.readRegNoEffect(miscReg);
48 }
49
50 MiscReg
51 ISA::readMiscReg(int miscReg, ThreadContext *tc)
52 {
53 return miscRegFile.readReg(miscReg, tc);
54 }
55
56 void
57 ISA::setMiscRegNoEffect(int miscReg, const MiscReg val)
58 {
59 miscRegFile.setRegNoEffect(miscReg, val);
60 }
61
62 void
63 ISA::setMiscReg(int miscReg, const MiscReg val, ThreadContext *tc)
64 {
65 miscRegFile.setReg(miscReg, val, tc);
66 }
67
68 void
69 ISA::serialize(std::ostream &os)
70 {
71 //miscRegFile.serialize(os);
72 }
73
74 void
75 ISA::unserialize(Checkpoint *cp, const std::string &section)
76 {
77 //miscRegFile.unserialize(cp, section);
78 }
79
80 }