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31 #ifndef __ARCH_MIPS_ISA_HH__
32 #define __ARCH_MIPS_ISA_HH__
38 #include "arch/mips/registers.hh"
39 #include "arch/mips/types.hh"
40 #include "sim/eventq.hh"
41 #include "sim/fault_fwd.hh"
42 #include "sim/sim_object.hh"
52 class ISA : public SimObject
55 // The MIPS name for this file is CP0 or Coprocessor 0
58 typedef MipsISAParams Params;
61 // Number of threads and vpes an individual ISA state can handle
71 std::vector<std::vector<MiscReg> > miscRegFile;
72 std::vector<std::vector<MiscReg> > miscRegFile_WriteMask;
73 std::vector<BankType> bankType;
80 unsigned getVPENum(ThreadID tid);
82 //////////////////////////////////////////////////////////
84 // READ/WRITE CP0 STATE
87 //////////////////////////////////////////////////////////
88 //@TODO: MIPS MT's register view automatically connects
89 // Status to TCStatus depending on current thread
90 void updateCP0ReadView(int misc_reg, ThreadID tid) { }
91 MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0);
94 MiscReg readMiscReg(int misc_reg,
95 ThreadContext *tc, ThreadID tid = 0);
97 MiscReg filterCP0Write(int misc_reg, int reg_sel, const MiscReg &val);
98 void setRegMask(int misc_reg, const MiscReg &val, ThreadID tid = 0);
99 void setMiscRegNoEffect(int misc_reg, const MiscReg &val,
102 //template <class TC>
103 void setMiscReg(int misc_reg, const MiscReg &val,
104 ThreadContext *tc, ThreadID tid = 0);
106 //////////////////////////////////////////////////////////
108 // DECLARE INTERFACE THAT WILL ALLOW A MiscRegFile (Cop0)
109 // TO SCHEDULE EVENTS
111 //////////////////////////////////////////////////////////
113 // Flag that is set when CP0 state has been written to.
116 // Enumerated List of CP0 Event Types
121 // Declare A CP0Event Class for scheduling
122 class CP0Event : public Event
127 CP0EventType cp0EventType;
131 /** Constructs a CP0 event. */
132 CP0Event(CP0 *_cp0, BaseCPU *_cpu, CP0EventType e_type);
134 /** Process this event. */
135 virtual void process();
137 /** Returns the description of this event. */
138 const char *description() const;
140 /** Schedule This Event */
141 void scheduleEvent(Cycles delay);
143 /** Unschedule This Event */
144 void unscheduleEvent();
147 // Schedule a CP0 Update Event
148 void scheduleCP0Update(BaseCPU *cpu, Cycles delay = Cycles(0));
150 // If any changes have been made, then check the state for changes
151 // and if necessary alert the CPU
152 void updateCPU(BaseCPU *cpu);
154 // Keep a List of CPU Events that need to be deallocated
155 std::queue<CP0Event*> cp0EventRemoveList;
157 static std::string miscRegNames[NumMiscRegs];
160 void startup(ThreadContext *tc) {}
162 /// Explicitly import the otherwise hidden startup
163 using SimObject::startup;
165 const Params *params() const;
170 flattenIntIndex(int reg)
176 flattenFloatIndex(int reg)
183 flattenCCIndex(int reg)