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32 #ifndef __ARCH_MIPS_ISA_TRAITS_HH__
33 #define __ARCH_MIPS_ISA_TRAITS_HH__
35 #include "arch/mips/constants.hh"
36 #include "arch/mips/types.hh"
37 #include "arch/mips/regfile/regfile.hh"
38 #include "arch/mips/faults.hh"
39 #include "arch/mips/utility.hh"
40 #include "base/misc.hh"
41 #include "config/full_system.hh"
42 #include "sim/byteswap.hh"
43 #include "sim/host.hh"
44 #include "sim/faults.hh"
53 namespace LittleEndianGuest {};
63 SyscallReturn(T v, bool s)
78 SyscallReturn& operator=(const SyscallReturn& s) {
84 bool successful() { return success; }
85 uint64_t value() { return retval; }
95 using namespace LittleEndianGuest;
97 static inline void setSyscallReturn(SyscallReturn return_value, RegFile *regs)
99 if (return_value.successful()) {
101 regs->setIntReg(SyscallSuccessReg, 0);
102 regs->setIntReg(ReturnValueReg1, return_value.value());
104 // got an error, return details
105 regs->setIntReg(SyscallSuccessReg, (IntReg) -1);
106 regs->setIntReg(ReturnValueReg1, -return_value.value());
110 StaticInstPtr decodeInst(ExtMachInst);
112 static inline ExtMachInst
113 makeExtMI(MachInst inst, const uint64_t &pc) {
115 ExtMachInst ext_inst = inst;
117 return ext_inst|=(static_cast<ExtMachInst>(pc & 0x1) << 32);
121 return ExtMachInst(inst);
126 * Function to insure ISA semantics about 0 registers.
127 * @param tc The thread context.
130 void zeroRegisters(TC *tc);
132 const Addr MaxAddr = (Addr)-1;
134 void copyRegs(ThreadContext *src, ThreadContext *dest);
136 // Machine operations
138 void saveMachineReg(AnyReg &savereg, const RegFile ®_file,
141 void restoreMachineReg(RegFile ®s, const AnyReg ®,
145 static void serializeSpecialRegs(const Serializable::Proxy &proxy,
146 const RegFile ®s);
148 static void unserializeSpecialRegs(const IniFile *db,
149 const std::string &category,
154 static inline Addr alignAddress(const Addr &addr,
155 unsigned int nbytes) {
156 return (addr & ~(nbytes - 1));
159 // Instruction address compression hooks
160 static inline Addr realPCToFetchPC(const Addr &addr) {
164 static inline Addr fetchPCToRealPC(const Addr &addr) {
168 // the size of "fetched" instructions (not necessarily the size
169 // of real instructions for PISA)
170 static inline size_t fetchInstSize() {
171 return sizeof(MachInst);
174 static inline MachInst makeRegisterCopy(int dest, int src) {
175 panic("makeRegisterCopy not implemented");
181 using namespace MipsISA;
183 #endif // __ARCH_MIPS_ISA_TRAITS_HH__