src/arch/mips/mmaped_ipr.hh

   1 /*
   2  * Copyright \e.A\eN) 2007 MIPS Technologies, Inc.  All Rights Reserved
   3  *
   4  * This software is part of the M5 simulator.
   5  *
   6  * THIS IS A LEGAL AGREEMENT.  BY DOWNLOADING, USING, COPYING, CREATING
   7  * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
   8  * TO THESE TERMS AND CONDITIONS.
   9  *
  10  * Permission is granted to use, copy, create derivative works and
  11  * distribute this software and such derivative works for any purpose,
  12  * so long as (1) the copyright notice above, this grant of permission,
  13  * and the disclaimer below appear in all copies and derivative works
  14  * made, (2) the copyright notice above is augmented as appropriate to
  15  * reflect the addition of any new copyrightable work in a derivative
  16  * work (e.g., Copyright \e.A\eN) <Publication Year> Copyright Owner), and (3)
  17  * the name of MIPS Technologies, Inc. (\e$B!H\e(BMIPS\e$B!I\e(B) is not used in any
  18  * advertising or publicity pertaining to the use or distribution of
  19  * this software without specific, written prior authorization.
  20  *
  21  * THIS SOFTWARE IS PROVIDED \e$B!H\e(BAS IS.\e$B!I\e(B  MIPS MAKES NO WARRANTIES AND
  22  * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
  23  * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
  25  * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
  26  * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
  27  * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
  28  * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
  29  * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
  30  * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
  31  * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
  32  * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
  33  *
  34  * Authors: Jaidev Patwardhan
  35  *
  36  */
  37
  38 #ifndef __ARCH_MIPS_MMAPED_IPR_HH__
  39 #define __ARCH_MIPS_MMAPED_IPR_HH__
  40
  41 /**
  42  * @file
  43  *
  44  * ISA-specific helper functions for memory mapped IPR accesses.
  45  */
  46
  47 #include "base/misc.hh"
  48 #include "mem/packet.hh"
  49
  50 class ThreadContext;
  51
  52 namespace MipsISA
  53 {
  54 inline Tick
  55 handleIprRead(ThreadContext *xc, Packet *pkt)
  56 {
  57     panic("No implementation for handleIprRead in MIPS\n");
  58 }
  59
  60 inline Tick
  61 handleIprWrite(ThreadContext *xc, Packet *pkt)
  62 {
  63     panic("No implementation for handleIprWrite in MIPS\n");
  64 }
  65
  66
  67 } // namespace MipsISA
  68
  69 #endif