Fix Num_Syscall_Descs check bug in non-x86 ISAs.
[gem5.git] / src / arch / mips / mt_constants.hh
1 /*
2 * Copyright (c) 2007 MIPS Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Korey Sewell
29 * Jaidev Patwardhan
30 */
31
32 #ifndef __ARCH_MIPS_MT_CONSTANTS_HH__
33 #define __ARCH_MIPS_MT_CONSTANTS_HH__
34
35 #include "arch/mips/types.hh"
36
37 namespace MipsISA
38 {
39 // MVPControl
40 const unsigned MVPC_EVP = 0;
41 const unsigned MVPC_CUR_VPE_HI = 3;
42 const unsigned MVPC_CUR_VPE_LO = 0;
43
44 // MVPConf0
45 const unsigned MVPC0_TCA = 15;
46 const unsigned MVPC0_PVPE_HI = 13;
47 const unsigned MVPC0_PVPE_LO = 10;
48 const unsigned MVPC0_PTC_HI = 7;
49 const unsigned MVPC0_PTC_LO = 0;
50
51 //VPEControl
52 const unsigned VPEC_YSI = 21;
53 const unsigned VPEC_EXCPT_HI = 18;
54 const unsigned VPEC_EXCPT_LO = 16;
55 const unsigned VPEC_TE = 15;
56 const unsigned VPEC_TARG_TC_HI = 7;
57 const unsigned VPEC_TARG_TC_LO = 0;
58
59 //VPEConf0
60 const unsigned VPEC0_MVP = 1;
61
62 //TCBind
63 const unsigned TCB_CUR_VPE_HI = 3;
64 const unsigned TCB_CUR_VPE_LO = 0;
65 const unsigned TCB_CUR_TC_HI = 28;
66 const unsigned TCB_CUR_TC_LO = 21;
67
68
69 //TCStatus
70 const unsigned TCS_TCU_HI = 31;
71 const unsigned TCS_TCU_LO = 28;
72 const unsigned TCS_TMX = 27;
73 const unsigned TCS_DT = 20;
74 const unsigned TCS_DA = 15;
75 const unsigned TCS_A = 13;
76 const unsigned TCS_TKSU_HI = 12;
77 const unsigned TCS_TKSU_LO = 11;
78 const unsigned TCS_IXMT = 7;
79 const unsigned TCS_ASID_HI = 7;
80 const unsigned TCS_ASID_LO = 7;
81
82 const unsigned TCSTATUS_TCU_HI = 31;
83 const unsigned TCSTATUS_TCU_LO = 28;
84 const unsigned TCSTATUS_TMX = 27;
85 const unsigned TCSTATUS_RNST_HI = 24;
86 const unsigned TCSTATUS_RNST_LO = 23;
87 const unsigned TCSTATUS_TDS = 21;
88 const unsigned TCSTATUS_DT = 20;
89 const unsigned TCSTATUS_DA = 15;
90 const unsigned TCSTATUS_A = 13;
91 const unsigned TCSTATUS_TKSU_HI = 12;
92 const unsigned TCSTATUS_TKSU_LO = 11;
93 const unsigned TCSTATUS_IXMT = 7;
94 const unsigned TCSTATUS_ASID_HI = 7;
95 const unsigned TCSTATUS_ASID_LO = 7;
96
97 //TCHalt
98 const unsigned TCH_H = 0;
99
100 //Status
101 const unsigned S_CU_HI = 31;
102 const unsigned S_CU_LO = 28;
103 const unsigned S_MX = 24;
104 const unsigned S_KSU_HI = 4;
105 const unsigned S_KSU_LO = 3;
106
107 // Config0
108 const unsigned CFG_M = 31;
109
110 // Config1
111 const unsigned CFG1_M = 31;
112
113 // Config2
114 const unsigned CFG2_M = 31;
115
116 // Config3
117 const unsigned CFG3_M = 31;
118 const unsigned CFG3_MT = 2;
119
120 } // namespace MipsISA
121
122 #endif