Add in files from merge-bare-iron, get them compiling in FS and SE mode
[gem5.git] / src / arch / mips / pagetable.cc
1 /*
2 * Copyright \eN) 2007 MIPS Technologies, Inc. All Rights Reserved
3 *
4 * This software is part of the M5 simulator.
5 *
6 * THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
7 * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
8 * TO THESE TERMS AND CONDITIONS.
9 *
10 * Permission is granted to use, copy, create derivative works and
11 * distribute this software and such derivative works for any purpose,
12 * so long as (1) the copyright notice above, this grant of permission,
13 * and the disclaimer below appear in all copies and derivative works
14 * made, (2) the copyright notice above is augmented as appropriate to
15 * reflect the addition of any new copyrightable work in a derivative
16 * work (e.g., Copyright \eN) <Publication Year> Copyright Owner), and (3)
17 * the name of MIPS Technologies, Inc. (\e$(B!H\e(BMIPS\e$(B!I\e(B) is not used in any
18 * advertising or publicity pertaining to the use or distribution of
19 * this software without specific, written prior authorization.
20 *
21 * THIS SOFTWARE IS PROVIDED \e$(B!H\e(BAS IS.\e$(B!I\e(B MIPS MAKES NO WARRANTIES AND
22 * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
23 * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
25 * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
26 * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
27 * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
28 * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
29 * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
30 * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
31 * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
32 * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
33 *
34 * Authors: Jaidev Patwardhan
35 *
36 */
37
38 #include "arch/mips/pagetable.hh"
39 #include "sim/serialize.hh"
40
41 namespace MipsISA
42 {
43
44
45 void
46 PTE::serialize(std::ostream &os)
47 {
48 SERIALIZE_SCALAR(Mask);
49 SERIALIZE_SCALAR(VPN);
50 SERIALIZE_SCALAR(asid);
51 SERIALIZE_SCALAR(G);
52 SERIALIZE_SCALAR(PFN0);
53 SERIALIZE_SCALAR(D0);
54 SERIALIZE_SCALAR(V0);
55 SERIALIZE_SCALAR(C0);
56 SERIALIZE_SCALAR(PFN1);
57 SERIALIZE_SCALAR(D1);
58 SERIALIZE_SCALAR(V1);
59 SERIALIZE_SCALAR(C1);
60 SERIALIZE_SCALAR(AddrShiftAmount);
61 SERIALIZE_SCALAR(OffsetMask);
62 }
63
64 void
65 PTE::unserialize(Checkpoint *cp, const std::string &section)
66 {
67 UNSERIALIZE_SCALAR(Mask);
68 UNSERIALIZE_SCALAR(VPN);
69 UNSERIALIZE_SCALAR(asid);
70 UNSERIALIZE_SCALAR(G);
71 UNSERIALIZE_SCALAR(PFN0);
72 UNSERIALIZE_SCALAR(D0);
73 UNSERIALIZE_SCALAR(V0);
74 UNSERIALIZE_SCALAR(C0);
75 UNSERIALIZE_SCALAR(PFN1);
76 UNSERIALIZE_SCALAR(D1);
77 UNSERIALIZE_SCALAR(V1);
78 UNSERIALIZE_SCALAR(C1);
79 UNSERIALIZE_SCALAR(AddrShiftAmount);
80 UNSERIALIZE_SCALAR(OffsetMask);
81 }
82 }