src/arch/mips/pagetable.hh

   1 /*
   2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
   3  * Copyright (c) 2007 MIPS Technologies, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  * Authors: Nathan Binkert
  30  *          Steve Reinhardt
  31  *          Jaidev Patwardhan
  32  */
  33
  34 #ifndef __ARCH_MIPS_PAGETABLE_H__
  35 #define __ARCH_MIPS_PAGETABLE_H__
  36
  37 #include "base/misc.hh"
  38 #include "base/types.hh"
  39 #include "sim/serialize.hh"
  40
  41 namespace MipsISA {
  42
  43 struct VAddr
  44 {
  45 };
  46
  47 // ITB/DTB page table entry
  48 struct PTE
  49 {
  50     Addr Mask;
  51     Addr VPN;
  52     uint8_t asid;
  53
  54     bool G;
  55
  56     /* Contents of Entry Lo0 */
  57     Addr PFN0;  // Physical Frame Number - Even
  58     bool D0;    // Even entry Dirty Bit
  59     bool V0;    // Even entry Valid Bit
  60     uint8_t C0; // Cache Coherency Bits - Even
  61
  62     /* Contents of Entry Lo1 */
  63     Addr PFN1;  // Physical Frame Number - Odd
  64     bool D1;    // Odd entry Dirty Bit
  65     bool V1;    // Odd entry Valid Bit
  66     uint8_t C1; // Cache Coherency Bits (3 bits)
  67
  68     /*
  69      * The next few variables are put in as optimizations to reduce
  70      * TLB lookup overheads. For a given Mask, what is the address shift
  71      * amount, and what is the OffsetMask
  72      */
  73     int AddrShiftAmount;
  74     int OffsetMask;
  75
  76     bool Valid() { return (V0 | V1); };
  77     void serialize(std::ostream &os);
  78     void unserialize(Checkpoint *cp, const std::string &section);
  79 };
  80
  81 // WARN: This particular TLB entry is not necessarily conformed to MIPS ISA
  82 struct TlbEntry
  83 {
  84     Addr _pageStart;
  85     TlbEntry() {}
  86     TlbEntry(Addr asn, Addr vaddr, Addr paddr,
  87              bool uncacheable, bool read_only)
  88         : _pageStart(paddr)
  89     {
  90         if (uncacheable || read_only)
  91             warn("MIPS TlbEntry does not support uncacheable"
  92                  " or read-only mappings\n");
  93     }
  94
  95     Addr pageStart()
  96     {
  97         return _pageStart;
  98     }
  99
 100     void
 101     updateVaddr(Addr new_vaddr) {}
 102
 103     void serialize(std::ostream &os)
 104     {
 105         SERIALIZE_SCALAR(_pageStart);
 106     }
 107
 108     void unserialize(Checkpoint *cp, const std::string &section)
 109     {
 110         UNSERIALIZE_SCALAR(_pageStart);
 111     }
 112
 113 };
 114
 115 };
 116 #endif // __ARCH_MIPS_PAGETABLE_H__
 117