ARM: Move the remaining microops out of the decoder and into the ISA desc.
[gem5.git] / src / arch / mips / predecoder.hh
1
2 /*
3 * Copyright (c) 2006 The Regents of The University of Michigan
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Gabe Black
30 */
31
32 #ifndef __ARCH_MIPS_PREDECODER_HH__
33 #define __ARCH_MIPS_PREDECODER_HH__
34
35 #include "arch/mips/types.hh"
36 #include "base/misc.hh"
37 #include "base/types.hh"
38
39 class ThreadContext;
40
41 namespace MipsISA
42 {
43 class Predecoder
44 {
45 protected:
46 ThreadContext * tc;
47 //The extended machine instruction being generated
48 ExtMachInst emi;
49
50 public:
51 Predecoder(ThreadContext * _tc) : tc(_tc)
52 {}
53
54 ThreadContext * getTC()
55 {
56 return tc;
57 }
58
59 void setTC(ThreadContext * _tc)
60 {
61 tc = _tc;
62 }
63
64 void process()
65 {
66 }
67
68 void reset()
69 {}
70
71 //Use this to give data to the predecoder. This should be used
72 //when there is control flow.
73 void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
74 {
75 emi = inst;
76 }
77
78 bool needMoreBytes()
79 {
80 return true;
81 }
82
83 bool extMachInstReady()
84 {
85 return true;
86 }
87
88 //This returns a constant reference to the ExtMachInst to avoid a copy
89 const ExtMachInst & getExtMachInst()
90 {
91 return emi;
92 }
93 };
94 };
95
96 #endif // __ARCH_MIPS_PREDECODER_HH__