O3: Send instruction back to fetch on squash to seed predecoder correctly.
[gem5.git] / src / arch / mips / predecoder.hh
1
2 /*
3 * Copyright (c) 2006 The Regents of The University of Michigan
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Gabe Black
30 */
31
32 #ifndef __ARCH_MIPS_PREDECODER_HH__
33 #define __ARCH_MIPS_PREDECODER_HH__
34
35 #include "arch/mips/types.hh"
36 #include "base/misc.hh"
37 #include "base/types.hh"
38
39 class ThreadContext;
40
41 namespace MipsISA
42 {
43
44 class Predecoder
45 {
46 protected:
47 ThreadContext * tc;
48 //The extended machine instruction being generated
49 ExtMachInst emi;
50 bool emiIsReady;
51
52 public:
53 Predecoder(ThreadContext * _tc) : tc(_tc), emiIsReady(false)
54 {}
55
56 ThreadContext *getTC()
57 {
58 return tc;
59 }
60
61 void
62 setTC(ThreadContext *_tc)
63 {
64 tc = _tc;
65 }
66
67 void
68 process()
69 {
70 }
71
72 void
73 reset()
74 {
75 emiIsReady = false;
76 }
77
78 void
79 reset(const ExtMachInst &old_emi)
80 {
81 reset();
82 }
83
84 //Use this to give data to the predecoder. This should be used
85 //when there is control flow.
86 void
87 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
88 {
89 emi = inst;
90 emiIsReady = true;
91 }
92
93 bool
94 needMoreBytes()
95 {
96 return true;
97 }
98
99 bool
100 extMachInstReady()
101 {
102 return emiIsReady;
103 }
104
105 //This returns a constant reference to the ExtMachInst to avoid a copy
106 const ExtMachInst &
107 getExtMachInst(PCState &pc)
108 {
109 emiIsReady = false;
110 return emi;
111 }
112 };
113
114 };
115
116 #endif // __ARCH_MIPS_PREDECODER_HH__