src/arch/mips/process.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  *          Korey Sewell
  31  */
  32
  33 #include "arch/mips/isa_traits.hh"
  34 #include "arch/mips/process.hh"
  35
  36 #include "base/loader/object_file.hh"
  37 #include "base/loader/elf_object.hh"
  38 #include "base/misc.hh"
  39 #include "cpu/thread_context.hh"
  40
  41 #include "mem/page_table.hh"
  42
  43 #include "sim/process.hh"
  44 #include "sim/process_impl.hh"
  45 #include "sim/system.hh"
  46
  47 using namespace std;
  48 using namespace MipsISA;
  49
  50 MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params,
  51         ObjectFile *objFile)
  52     : LiveProcess(params, objFile)
  53 {
  54     // Set up stack. On MIPS, stack starts at the top of kuseg
  55     // user address space. MIPS stack grows down from here
  56     stack_base = 0x7FFFFFFF;
  57
  58     // Set pointer for next thread stack.  Reserve 8M for main stack.
  59     next_thread_stack_base = stack_base - (8 * 1024 * 1024);
  60
  61     // Set up break point (Top of Heap)
  62     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
  63     brk_point = roundUp(brk_point, VMPageSize);
  64
  65     // Set up region for mmaps.  Start it 1GB above the top of the heap.
  66     mmap_start = mmap_end = brk_point + 0x40000000L;
  67 }
  68
  69 void
  70 MipsLiveProcess::startup()
  71 {
  72     Process::startup();
  73
  74     argsInit<uint32_t>(VMPageSize);
  75 }
  76
  77 template<class IntType>
  78 void
  79 MipsLiveProcess::argsInit(int pageSize)
  80 {
  81     int intSize = sizeof(IntType);
  82     Process::startup();
  83
  84     // load object file into target memory
  85     objFile->loadSections(initVirtMem);
  86
  87     typedef AuxVector<IntType> auxv_t;
  88     std::vector<auxv_t> auxv;
  89
  90     ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
  91     if (elfObject)
  92     {
  93         // Set the system page size
  94         auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::VMPageSize));
  95         // Set the frequency at which time() increments
  96         auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
  97         // For statically linked executables, this is the virtual
  98         // address of the program header tables if they appear in the
  99         // executable image.
 100         auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
 101         DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable());
 102         // This is the size of a program header entry from the elf file.
 103         auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
 104         // This is the number of program headers from the original elf file.
 105         auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
 106         //The entry point to the program
 107         auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
 108         //Different user and group IDs
 109         auxv.push_back(auxv_t(M5_AT_UID, uid()));
 110         auxv.push_back(auxv_t(M5_AT_EUID, euid()));
 111         auxv.push_back(auxv_t(M5_AT_GID, gid()));
 112         auxv.push_back(auxv_t(M5_AT_EGID, egid()));
 113     }
 114
 115     // Calculate how much space we need for arg & env & auxv arrays.
 116     int argv_array_size = intSize * (argv.size() + 1);
 117     int envp_array_size = intSize * (envp.size() + 1);
 118     int auxv_array_size = intSize * 2 * (auxv.size() + 1);
 119
 120     int arg_data_size = 0;
 121     for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
 122         arg_data_size += argv[i].size() + 1;
 123     }
 124     int env_data_size = 0;
 125     for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
 126         env_data_size += envp[i].size() + 1;
 127     }
 128
 129     int space_needed =
 130         argv_array_size +
 131         envp_array_size +
 132         auxv_array_size +
 133         arg_data_size +
 134         env_data_size;
 135
 136     // set bottom of stack
 137     stack_min = stack_base - space_needed;
 138     // align it
 139     stack_min = roundDown(stack_min, pageSize);
 140     stack_size = stack_base - stack_min;
 141     // map memory
 142     pTable->allocate(stack_min, roundUp(stack_size, pageSize));
 143
 144     // map out initial stack contents
 145     IntType argv_array_base = stack_min + intSize; // room for argc
 146     IntType envp_array_base = argv_array_base + argv_array_size;
 147     IntType auxv_array_base = envp_array_base + envp_array_size;
 148     IntType arg_data_base = auxv_array_base + auxv_array_size;
 149     IntType env_data_base = arg_data_base + arg_data_size;
 150
 151     // write contents to stack
 152     IntType argc = argv.size();
 153
 154     argc = htog((IntType)argc);
 155
 156     initVirtMem->writeBlob(stack_min, (uint8_t*)&argc, intSize);
 157
 158     copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
 159
 160     copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
 161
 162     // Copy the aux vector
 163     for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
 164         initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
 165                 (uint8_t*)&(auxv[x].a_type), intSize);
 166         initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
 167                 (uint8_t*)&(auxv[x].a_val), intSize);
 168     }
 169
 170     // Write out the terminating zeroed auxilliary vector
 171     for (unsigned i = 0; i < 2; i++) {
 172         const IntType zero = 0;
 173         const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i);
 174         initVirtMem->writeBlob(addr, (uint8_t*)&zero, intSize);
 175     }
 176
 177     ThreadContext *tc = system->getThreadContext(contextIds[0]);
 178
 179     setSyscallArg(tc, 0, argc);
 180     setSyscallArg(tc, 1, argv_array_base);
 181     tc->setIntReg(StackPointerReg, stack_min);
 182
 183     Addr prog_entry = objFile->entryPoint();
 184     tc->setPC(prog_entry);
 185     tc->setNextPC(prog_entry + sizeof(MachInst));
 186     tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
 187 }
 188
 189
 190 MipsISA::IntReg
 191 MipsLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
 192 {
 193     assert(i < 6);
 194     return tc->readIntReg(FirstArgumentReg + i++);
 195 }
 196
 197 void
 198 MipsLiveProcess::setSyscallArg(ThreadContext *tc,
 199         int i, MipsISA::IntReg val)
 200 {
 201     assert(i < 6);
 202     tc->setIntReg(FirstArgumentReg + i, val);
 203 }
 204
 205 void
 206 MipsLiveProcess::setSyscallReturn(ThreadContext *tc,
 207         SyscallReturn return_value)
 208 {
 209     if (return_value.successful()) {
 210         // no error
 211         tc->setIntReg(SyscallSuccessReg, 0);
 212         tc->setIntReg(ReturnValueReg, return_value.value());
 213     } else {
 214         // got an error, return details
 215         tc->setIntReg(SyscallSuccessReg, (IntReg) -1);
 216         tc->setIntReg(ReturnValueReg, -return_value.value());
 217     }
 218 }