src/arch/mips/process.cc

   1 /*
   2  * Copyright \eN) 2007 MIPS Technologies, Inc.  All Rights Reserved
   3  *
   4  * This software is part of the M5 simulator.
   5  *
   6  * THIS IS A LEGAL AGREEMENT.  BY DOWNLOADING, USING, COPYING, CREATING
   7  * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
   8  * TO THESE TERMS AND CONDITIONS.
   9  *
  10  * Permission is granted to use, copy, create derivative works and
  11  * distribute this software and such derivative works for any purpose,
  12  * so long as (1) the copyright notice above, this grant of permission,
  13  * and the disclaimer below appear in all copies and derivative works
  14  * made, (2) the copyright notice above is augmented as appropriate to
  15  * reflect the addition of any new copyrightable work in a derivative
  16  * work (e.g., Copyright \eN) <Publication Year> Copyright Owner), and (3)
  17  * the name of MIPS Technologies, Inc. (\e$(B!H\e(BMIPS\e$(B!I\e(B) is not used in any
  18  * advertising or publicity pertaining to the use or distribution of
  19  * this software without specific, written prior authorization.
  20  *
  21  * THIS SOFTWARE IS PROVIDED \e$(B!H\e(BAS IS.\e$(B!I\e(B  MIPS MAKES NO WARRANTIES AND
  22  * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
  23  * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
  25  * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
  26  * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
  27  * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
  28  * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
  29  * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
  30  * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
  31  * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
  32  * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
  33  *
  34  * Authors: Gabe M. Black
  35  *          Ali G. Saidi
  36  *          Korey L. Sewell
  37  */
  38
  39 #include "arch/mips/isa_traits.hh"
  40 #include "arch/mips/process.hh"
  41 #include "base/loader/object_file.hh"
  42 #include "base/misc.hh"
  43 #include "cpu/thread_context.hh"
  44 #include "sim/system.hh"
  45
  46 using namespace std;
  47 using namespace MipsISA;
  48
  49 MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params,
  50         ObjectFile *objFile)
  51     : LiveProcess(params, objFile)
  52 {
  53     // Set up stack. On MIPS, stack starts at the top of kuseg
  54     // user address space. MIPS stack grows down from here
  55     stack_base = 0x7FFFFFFF;
  56
  57     // Set pointer for next thread stack.  Reserve 8M for main stack.
  58     next_thread_stack_base = stack_base - (8 * 1024 * 1024);
  59
  60     // Set up break point (Top of Heap)
  61     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
  62     brk_point = roundUp(brk_point, VMPageSize);
  63
  64     // Set up region for mmaps. For now, start at bottom of kuseg space.
  65     mmap_start = mmap_end = 0x10000;
  66 }
  67
  68 void
  69 MipsLiveProcess::startup()
  70 {
  71     argsInit(MachineBytes, VMPageSize);
  72 }