src/arch/mips/process.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Ali Saidi
  30  *          Korey Sewell
  31  */
  32
  33 #include "arch/mips/isa_traits.hh"
  34 #include "arch/mips/process.hh"
  35 #include "base/loader/object_file.hh"
  36 #include "base/misc.hh"
  37 #include "cpu/thread_context.hh"
  38 #include "sim/system.hh"
  39
  40 using namespace std;
  41 using namespace MipsISA;
  42
  43 static const int SyscallSuccessReg = 7;
  44 static const int FirstArgumentReg = 4;
  45 static const int ReturnValueReg = 2;
  46
  47 MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params,
  48         ObjectFile *objFile)
  49     : LiveProcess(params, objFile)
  50 {
  51     // Set up stack. On MIPS, stack starts at the top of kuseg
  52     // user address space. MIPS stack grows down from here
  53     stack_base = 0x7FFFFFFF;
  54
  55     // Set pointer for next thread stack.  Reserve 8M for main stack.
  56     next_thread_stack_base = stack_base - (8 * 1024 * 1024);
  57
  58     // Set up break point (Top of Heap)
  59     brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
  60     brk_point = roundUp(brk_point, VMPageSize);
  61
  62     // Set up region for mmaps. For now, start at bottom of kuseg space.
  63     mmap_start = mmap_end = 0x10000;
  64 }
  65
  66 void
  67 MipsLiveProcess::startup()
  68 {
  69     argsInit(MachineBytes, VMPageSize);
  70 }
  71
  72 MipsISA::IntReg
  73 MipsLiveProcess::getSyscallArg(ThreadContext *tc, int i)
  74 {
  75     assert(i < 6);
  76     return tc->readIntReg(FirstArgumentReg + i);
  77 }
  78
  79 void
  80 MipsLiveProcess::setSyscallArg(ThreadContext *tc,
  81         int i, MipsISA::IntReg val)
  82 {
  83     assert(i < 6);
  84     tc->setIntReg(FirstArgumentReg + i, val);
  85 }
  86
  87 void
  88 MipsLiveProcess::setSyscallReturn(ThreadContext *tc,
  89         SyscallReturn return_value)
  90 {
  91     if (return_value.successful()) {
  92         // no error
  93         tc->setIntReg(SyscallSuccessReg, 0);
  94         tc->setIntReg(ReturnValueReg, return_value.value());
  95     } else {
  96         // got an error, return details
  97         tc->setIntReg(SyscallSuccessReg, (IntReg) -1);
  98         tc->setIntReg(ReturnValueReg, -return_value.value());
  99     }
 100 }