src/arch/mips/regfile/regfile.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  */
  30
  31 #ifndef __ARCH_MIPS_REGFILE_HH__
  32 #define __ARCH_MIPS_REGFILE_HH__
  33
  34 #include "arch/mips/types.hh"
  35 #include "arch/mips/constants.hh"
  36 #include "arch/mips/regfile/int_regfile.hh"
  37 #include "arch/mips/regfile/float_regfile.hh"
  38 #include "arch/mips/regfile/misc_regfile.hh"
  39 #include "sim/faults.hh"
  40
  41 class Checkpoint;
  42 class ThreadContext;
  43
  44 namespace MipsISA
  45 {
  46     class RegFile {
  47       protected:
  48         IntRegFile intRegFile;          // (signed) integer register file
  49         FloatRegFile floatRegFile;      // floating point register file
  50         MiscRegFile miscRegFile;        // control register file
  51
  52       public:
  53
  54         void clear()
  55         {
  56             bzero(&intRegFile, sizeof(intRegFile));
  57             bzero(&floatRegFile, sizeof(floatRegFile));
  58             bzero(&miscRegFile, sizeof(miscRegFile));
  59         }
  60
  61         MiscReg readMiscReg(int miscReg)
  62         {
  63             return miscRegFile.readReg(miscReg);
  64         }
  65
  66         MiscReg readMiscRegWithEffect(int miscReg,
  67                 Fault &fault, ThreadContext *tc)
  68         {
  69             fault = NoFault;
  70             return miscRegFile.readRegWithEffect(miscReg, fault, tc);
  71         }
  72
  73         Fault setMiscReg(int miscReg, const MiscReg &val)
  74         {
  75             return miscRegFile.setReg(miscReg, val);
  76         }
  77
  78         Fault setMiscRegWithEffect(int miscReg, const MiscReg &val,
  79                 ThreadContext * tc)
  80         {
  81             return miscRegFile.setRegWithEffect(miscReg, val, tc);
  82         }
  83
  84         FloatReg readFloatReg(int floatReg)
  85         {
  86             return floatRegFile.readReg(floatReg,SingleWidth);
  87         }
  88
  89         FloatReg readFloatReg(int floatReg, int width)
  90         {
  91             return floatRegFile.readReg(floatReg,width);
  92         }
  93
  94         FloatRegBits readFloatRegBits(int floatReg)
  95         {
  96             return floatRegFile.readRegBits(floatReg,SingleWidth);
  97         }
  98
  99         FloatRegBits readFloatRegBits(int floatReg, int width)
 100         {
 101             return floatRegFile.readRegBits(floatReg,width);
 102         }
 103
 104         Fault setFloatReg(int floatReg, const FloatReg &val)
 105         {
 106             return floatRegFile.setReg(floatReg, val, SingleWidth);
 107         }
 108
 109         Fault setFloatReg(int floatReg, const FloatReg &val, int width)
 110         {
 111             return floatRegFile.setReg(floatReg, val, width);
 112         }
 113
 114         Fault setFloatRegBits(int floatReg, const FloatRegBits &val)
 115         {
 116             return floatRegFile.setRegBits(floatReg, val, SingleWidth);
 117         }
 118
 119         Fault setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
 120         {
 121             return floatRegFile.setRegBits(floatReg, val, width);
 122         }
 123
 124         IntReg readIntReg(int intReg)
 125         {
 126             return intRegFile.readReg(intReg);
 127         }
 128
 129         Fault setIntReg(int intReg, const IntReg &val)
 130         {
 131             return intRegFile.setReg(intReg, val);
 132         }
 133       protected:
 134
 135         Addr pc;                        // program counter
 136         Addr npc;                       // next-cycle program counter
 137         Addr nnpc;                      // next-next-cycle program counter
 138                                         // used to implement branch delay slot
 139                                         // not real register
 140       public:
 141         Addr readPC()
 142         {
 143             return pc;
 144         }
 145
 146         void setPC(Addr val)
 147         {
 148             pc = val;
 149         }
 150
 151         Addr readNextPC()
 152         {
 153             return npc;
 154         }
 155
 156         void setNextPC(Addr val)
 157         {
 158             npc = val;
 159         }
 160
 161         Addr readNextNPC()
 162         {
 163             return nnpc;
 164         }
 165
 166         void setNextNPC(Addr val)
 167         {
 168             nnpc = val;
 169         }
 170
 171
 172 #if FULL_SYSTEM
 173         IntReg palregs[NumIntRegs];     // PAL shadow registers
 174         InternalProcReg ipr[NumInternalProcRegs]; // internal processor regs
 175         int intrflag;                   // interrupt flag
 176         bool pal_shadow;                // using pal_shadow registers
 177         inline int instAsid() { return MIPS34K::ITB_ASN_ASN(ipr[IPR_ITB_ASN]); }
 178         inline int dataAsid() { return MIPS34K::DTB_ASN_ASN(ipr[IPR_DTB_ASN]); }
 179 #endif // FULL_SYSTEM
 180
 181         void serialize(std::ostream &os);
 182         void unserialize(Checkpoint *cp, const std::string &section);
 183
 184         typedef int ContextParam;
 185         typedef int ContextVal;
 186
 187         void changeContext(ContextParam param, ContextVal val)
 188         {
 189         }
 190     };
 191
 192     void copyRegs(ThreadContext *src, ThreadContext *dest);
 193
 194     void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
 195
 196 #if FULL_SYSTEM
 197     void copyIprs(ThreadContext *src, ThreadContext *dest);
 198 #endif
 199 } // namespace MipsISA
 200
 201 #endif