src/arch/mips/regfile/regfile.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #ifndef __ARCH_MIPS_REGFILE_HH__
  30 #define __ARCH_MIPS_REGFILE_HH__
  31
  32 #include "arch/mips/types.hh"
  33 #include "arch/mips/constants.hh"
  34 #include "arch/mips/regfile/int_regfile.hh"
  35 #include "arch/mips/regfile/float_regfile.hh"
  36 #include "arch/mips/regfile/misc_regfile.hh"
  37 #include "sim/faults.hh"
  38
  39 class Checkpoint;
  40 class ExecContext;
  41
  42 namespace MipsISA
  43 {
  44     class RegFile {
  45       protected:
  46         IntRegFile intRegFile;          // (signed) integer register file
  47         FloatRegFile floatRegFile;      // floating point register file
  48         MiscRegFile miscRegFile;        // control register file
  49
  50       public:
  51
  52         void clear()
  53         {
  54             bzero(&intRegFile, sizeof(intRegFile));
  55             bzero(&floatRegFile, sizeof(floatRegFile));
  56             bzero(&miscRegFile, sizeof(miscRegFile));
  57         }
  58
  59         MiscReg readMiscReg(int miscReg)
  60         {
  61             return miscRegFile.readReg(miscReg);
  62         }
  63
  64         MiscReg readMiscRegWithEffect(int miscReg,
  65                 Fault &fault, ExecContext *xc)
  66         {
  67             fault = NoFault;
  68             return miscRegFile.readRegWithEffect(miscReg, fault, xc);
  69         }
  70
  71         Fault setMiscReg(int miscReg, const MiscReg &val)
  72         {
  73             return miscRegFile.setReg(miscReg, val);
  74         }
  75
  76         Fault setMiscRegWithEffect(int miscReg, const MiscReg &val,
  77                 ExecContext * xc)
  78         {
  79             return miscRegFile.setRegWithEffect(miscReg, val, xc);
  80         }
  81
  82         FloatReg readFloatReg(int floatReg)
  83         {
  84             return floatRegFile.readReg(floatReg,SingleWidth);
  85         }
  86
  87         FloatReg readFloatReg(int floatReg, int width)
  88         {
  89             return floatRegFile.readReg(floatReg,width);
  90         }
  91
  92         FloatRegBits readFloatRegBits(int floatReg)
  93         {
  94             return floatRegFile.readRegBits(floatReg,SingleWidth);
  95         }
  96
  97         FloatRegBits readFloatRegBits(int floatReg, int width)
  98         {
  99             return floatRegFile.readRegBits(floatReg,width);
 100         }
 101
 102         Fault setFloatReg(int floatReg, const FloatReg &val)
 103         {
 104             return floatRegFile.setReg(floatReg, val, SingleWidth);
 105         }
 106
 107         Fault setFloatReg(int floatReg, const FloatReg &val, int width)
 108         {
 109             return floatRegFile.setReg(floatReg, val, width);
 110         }
 111
 112         Fault setFloatRegBits(int floatReg, const FloatRegBits &val)
 113         {
 114             return floatRegFile.setRegBits(floatReg, val, SingleWidth);
 115         }
 116
 117         Fault setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
 118         {
 119             return floatRegFile.setRegBits(floatReg, val, width);
 120         }
 121
 122         IntReg readIntReg(int intReg)
 123         {
 124             return intRegFile.readReg(intReg);
 125         }
 126
 127         Fault setIntReg(int intReg, const IntReg &val)
 128         {
 129             return intRegFile.setReg(intReg, val);
 130         }
 131       protected:
 132
 133         Addr pc;                        // program counter
 134         Addr npc;                       // next-cycle program counter
 135         Addr nnpc;                      // next-next-cycle program counter
 136                                         // used to implement branch delay slot
 137                                         // not real register
 138       public:
 139         Addr readPC()
 140         {
 141             return pc;
 142         }
 143
 144         void setPC(Addr val)
 145         {
 146             pc = val;
 147         }
 148
 149         Addr readNextPC()
 150         {
 151             return npc;
 152         }
 153
 154         void setNextPC(Addr val)
 155         {
 156             npc = val;
 157         }
 158
 159         Addr readNextNPC()
 160         {
 161             return nnpc;
 162         }
 163
 164         void setNextNPC(Addr val)
 165         {
 166             nnpc = val;
 167         }
 168
 169
 170 #if FULL_SYSTEM
 171         IntReg palregs[NumIntRegs];     // PAL shadow registers
 172         InternalProcReg ipr[NumInternalProcRegs]; // internal processor regs
 173         int intrflag;                   // interrupt flag
 174         bool pal_shadow;                // using pal_shadow registers
 175         inline int instAsid() { return MIPS34K::ITB_ASN_ASN(ipr[IPR_ITB_ASN]); }
 176         inline int dataAsid() { return MIPS34K::DTB_ASN_ASN(ipr[IPR_DTB_ASN]); }
 177 #endif // FULL_SYSTEM
 178
 179         void serialize(std::ostream &os);
 180         void unserialize(Checkpoint *cp, const std::string &section);
 181
 182         typedef int ContextParam;
 183         typedef int ContextVal;
 184
 185         void changeContext(ContextParam param, ContextVal val)
 186         {
 187         }
 188     };
 189
 190     void copyRegs(ExecContext *src, ExecContext *dest);
 191
 192     void copyMiscRegs(ExecContext *src, ExecContext *dest);
 193
 194 #if FULL_SYSTEM
 195     void copyIprs(ExecContext *src, ExecContext *dest);
 196 #endif
 197 } // namespace MipsISA
 198
 199 #endif