2 * Copyright (c) 2010 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 * Authors: Nathan Binkert
46 * Copyright (c) 1990, 1993 The Regents of the University of California
49 * This software was developed by the Computer Systems Engineering group
50 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
51 * contributed to Berkeley.
53 * All advertising materials mentioning features or use of this software
54 * must display the following acknowledgement:
55 * This product includes software developed by the University of
56 * California, Lawrence Berkeley Laboratories.
58 * Redistribution and use in source and binary forms, with or without
59 * modification, are permitted provided that the following conditions
61 * 1. Redistributions of source code must retain the above copyright
62 * notice, this list of conditions and the following disclaimer.
63 * 2. Redistributions in binary form must reproduce the above copyright
64 * notice, this list of conditions and the following disclaimer in the
65 * documentation and/or other materials provided with the distribution.
66 * 3. All advertising materials mentioning features or use of this software
67 * must display the following acknowledgement:
68 * This product includes software developed by the University of
69 * California, Berkeley and its contributors.
70 * 4. Neither the name of the University nor the names of its contributors
71 * may be used to endorse or promote products derived from this software
72 * without specific prior written permission.
74 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
75 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
76 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
77 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
78 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
79 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
80 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
81 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
82 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
83 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
86 * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
90 * Copyright (c) 2001 The NetBSD Foundation, Inc.
91 * All rights reserved.
93 * This code is derived from software contributed to The NetBSD Foundation
96 * Redistribution and use in source and binary forms, with or without
97 * modification, are permitted provided that the following conditions
99 * 1. Redistributions of source code must retain the above copyright
100 * notice, this list of conditions and the following disclaimer.
101 * 2. Redistributions in binary form must reproduce the above copyright
102 * notice, this list of conditions and the following disclaimer in the
103 * documentation and/or other materials provided with the distribution.
104 * 3. All advertising materials mentioning features or use of this software
105 * must display the following acknowledgement:
106 * This product includes software developed by the NetBSD
107 * Foundation, Inc. and its contributors.
108 * 4. Neither the name of The NetBSD Foundation nor the names of its
109 * contributors may be used to endorse or promote products derived
110 * from this software without specific prior written permission.
112 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
113 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
114 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
115 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
116 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
117 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
118 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
119 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
120 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
121 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
122 * POSSIBILITY OF SUCH DAMAGE.
126 * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
130 * "Stub" to allow remote cpu to debug over a serial line using gdb.
133 #include <sys/signal.h>
138 #include "arch/mips/decoder.hh"
139 #include "arch/mips/remote_gdb.hh"
140 #include "arch/mips/vtophys.hh"
141 #include "cpu/thread_state.hh"
142 #include "debug/GDBAcc.hh"
143 #include "debug/GDBMisc.hh"
144 #include "mem/page_table.hh"
145 #include "sim/full_system.hh"
148 using namespace MipsISA
;
150 RemoteGDB::RemoteGDB(System
*_system
, ThreadContext
*tc
)
151 : BaseRemoteGDB(_system
, tc
, GdbNumRegs
)
156 * Determine if the mapping at va..(va+len) is valid.
159 RemoteGDB::acc(Addr va
, size_t len
)
162 //Check to make sure the first byte is mapped into the processes address
165 panic("acc not implemented for MIPS FS!");
167 return context
->getProcessPtr()->pTable
->lookup(va
, entry
);
171 * Translate the kernel debugger register format into the GDB register
177 DPRINTF(GDBAcc
, "getregs in remotegdb \n");
178 memset(gdbregs
.regs
, 0, gdbregs
.bytes());
180 // MIPS registers are 32 bits wide, gdb registers are 64 bits wide
181 // two MIPS registers are packed into one gdb register (little endian)
184 for (int i
= 0; i
< GdbIntArchRegs
; i
++) {
185 gdbregs
.regs
[i
] = pack(
186 context
->readIntReg(i
* 2),
187 context
->readIntReg(i
* 2 + 1));
189 // SR, LO, HI, BADVADDR, CAUSE, PC
190 gdbregs
.regs
[GdbIntArchRegs
+ 0] = pack(
191 context
->readMiscRegNoEffect(MISCREG_STATUS
),
192 context
->readIntReg(INTREG_LO
));
193 gdbregs
.regs
[GdbIntArchRegs
+ 1] = pack(
194 context
->readIntReg(INTREG_HI
),
195 context
->readMiscRegNoEffect(MISCREG_BADVADDR
));
196 gdbregs
.regs
[GdbIntArchRegs
+ 2] = pack(
197 context
->readMiscRegNoEffect(MISCREG_CAUSE
),
198 context
->pcState().pc());
200 for (int i
= 0; i
< GdbFloatArchRegs
; i
++) {
201 gdbregs
.regs
[GdbIntRegs
+ i
] = pack(
202 context
->readFloatRegBits(i
* 2),
203 context
->readFloatRegBits(i
* 2 + 1));
206 gdbregs
.regs
[GdbIntRegs
+ GdbFloatArchRegs
+ 0] = pack(
207 context
->readFloatRegBits(FLOATREG_FCCR
),
208 context
->readFloatRegBits(FLOATREG_FIR
));
212 * Translate the GDB register format into the kernel debugger register
218 DPRINTF(GDBAcc
, "setregs in remotegdb \n");
220 // MIPS registers are 32 bits wide, gdb registers are 64 bits wide
221 // two MIPS registers are packed into one gdb register (little endian)
224 for (int i
= 0; i
< GdbIntArchRegs
; i
++) {
225 if (i
) context
->setIntReg(i
* 2,
226 unpackLo(gdbregs
.regs
[i
]));
227 context
->setIntReg(i
* 2 + 1,
228 unpackHi(gdbregs
.regs
[i
]));
230 // SR, LO, HI, BADVADDR, CAUSE, PC
231 context
->setMiscRegNoEffect(MISCREG_STATUS
,
232 unpackLo(gdbregs
.regs
[GdbIntArchRegs
+ 0]));
233 context
->setIntReg(INTREG_LO
,
234 unpackHi(gdbregs
.regs
[GdbIntArchRegs
+ 0]));
235 context
->setIntReg(INTREG_HI
,
236 unpackLo(gdbregs
.regs
[GdbIntArchRegs
+ 1]));
237 context
->setMiscRegNoEffect(MISCREG_BADVADDR
,
238 unpackHi(gdbregs
.regs
[GdbIntArchRegs
+ 1]));
239 context
->setMiscRegNoEffect(MISCREG_CAUSE
,
240 unpackLo(gdbregs
.regs
[GdbIntArchRegs
+ 2]));
242 unpackHi(gdbregs
.regs
[GdbIntArchRegs
+ 2]));
244 for (int i
= 0; i
< GdbFloatArchRegs
; i
++) {
245 context
->setFloatRegBits(i
* 2,
246 unpackLo(gdbregs
.regs
[GdbIntRegs
+ i
]));
247 context
->setFloatRegBits(i
* 2 + 1,
248 unpackHi(gdbregs
.regs
[GdbIntRegs
+ i
]));
251 context
->setFloatRegBits(FLOATREG_FCCR
,
252 unpackLo(gdbregs
.regs
[GdbIntRegs
+ GdbFloatArchRegs
+ 0]));
253 context
->setFloatRegBits(FLOATREG_FIR
,
254 unpackHi(gdbregs
.regs
[GdbIntRegs
+ GdbFloatArchRegs
+ 0]));
258 RemoteGDB::clearSingleStep()
260 DPRINTF(GDBMisc
, "clearSingleStep bt_addr=%#x nt_addr=%#x\n",
261 takenBkpt
, notTakenBkpt
);
264 clearTempBreakpoint(takenBkpt
);
266 if (notTakenBkpt
!= 0)
267 clearTempBreakpoint(notTakenBkpt
);
271 RemoteGDB::setSingleStep()
273 PCState pc
= context
->pcState();
277 // User was stopped at pc, e.g. the instruction at pc was not
279 MachInst inst
= read
<MachInst
>(pc
.pc());
280 StaticInstPtr si
= context
->getDecoderPtr()->decode(inst
, pc
.pc());
281 if (si
->hasBranchTarget(pc
, context
, bpc
)) {
282 // Don't bother setting a breakpoint on the taken branch if it
283 // is the same as the next npc
284 if (bpc
.npc() != pc
.nnpc())
288 DPRINTF(GDBMisc
, "setSingleStep bt_addr=%#x nt_addr=%#x\n",
289 takenBkpt
, notTakenBkpt
);
291 notTakenBkpt
= pc
.nnpc();
292 setTempBreakpoint(notTakenBkpt
);
295 takenBkpt
= bpc
.npc();
296 setTempBreakpoint(takenBkpt
);