src/arch/mips/stacktrace.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Nathan Binkert
  29  */
  30
  31 #include <string>
  32
  33 #include "arch/mips/isa_traits.hh"
  34 #include "arch/mips/stacktrace.hh"
  35 #include "arch/mips/vtophys.hh"
  36 #include "base/bitfield.hh"
  37 #include "base/trace.hh"
  38 #include "cpu/base.hh"
  39 #include "cpu/thread_context.hh"
  40 #include "mem/fs_translating_port_proxy.hh"
  41 #include "sim/system.hh"
  42
  43 using namespace std;
  44 using namespace MipsISA;
  45
  46 ProcessInfo::ProcessInfo(ThreadContext *_tc) : tc(_tc)
  47 {}
  48
  49 Addr
  50 ProcessInfo::task(Addr ksp) const
  51 {
  52     Addr base = ksp & ~0x3fff;
  53     if (base == ULL(0xfffffc0000000000))
  54         return 0;
  55
  56     Addr tsk;
  57
  58     FSTranslatingPortProxy &vp = tc->getVirtProxy();
  59     tsk = vp.readGtoH<Addr>(base + task_off);
  60
  61     return tsk;
  62 }
  63
  64 int
  65 ProcessInfo::pid(Addr ksp) const
  66 {
  67     Addr task = this->task(ksp);
  68     if (!task)
  69         return -1;
  70
  71     uint16_t pd;
  72
  73     FSTranslatingPortProxy &vp = tc->getVirtProxy();
  74     pd = vp.readGtoH<uint16_t>(task + pid_off);
  75
  76     return pd;
  77 }
  78
  79 string
  80 ProcessInfo::name(Addr ksp) const
  81 {
  82     Addr task = this->task(ksp);
  83     if (!task)
  84         return "console";
  85
  86     char comm[256];
  87     CopyStringOut(tc, comm, task + name_off, sizeof(comm));
  88     if (!comm[0])
  89         return "startup";
  90
  91     return comm;
  92 }
  93
  94 StackTrace::StackTrace()
  95     : tc(0), stack(64)
  96 {
  97 }
  98
  99 StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
 100     : tc(0), stack(64)
 101 {
 102     trace(_tc, inst);
 103 }
 104
 105 StackTrace::~StackTrace()
 106 {
 107 }
 108
 109 void
 110 StackTrace::trace(ThreadContext *_tc, bool is_call)
 111 {
 112     tc = _tc;
 113     bool usermode = 0;
 114
 115     if (usermode) {
 116         stack.push_back(user);
 117         return;
 118     }
 119 }
 120
 121 bool
 122 StackTrace::isEntry(Addr addr)
 123 {
 124     return false;
 125 }
 126
 127 bool
 128 StackTrace::decodeStack(MachInst inst, int &disp)
 129 {
 130     // lda $sp, -disp($sp)
 131     //
 132     // Opcode<31:26> == 0x08
 133     // RA<25:21> == 30
 134     // RB<20:16> == 30
 135     // Disp<15:0>
 136     const MachInst mem_mask = 0xffff0000;
 137     const MachInst lda_pattern = 0x23de0000;
 138     const MachInst lda_disp_mask = 0x0000ffff;
 139
 140     // subq $sp, disp, $sp
 141     // addq $sp, disp, $sp
 142     //
 143     // Opcode<31:26> == 0x10
 144     // RA<25:21> == 30
 145     // Lit<20:13>
 146     // One<12> = 1
 147     // Func<11:5> == 0x20 (addq)
 148     // Func<11:5> == 0x29 (subq)
 149     // RC<4:0> == 30
 150     const MachInst intop_mask = 0xffe01fff;
 151     const MachInst addq_pattern = 0x43c0141e;
 152     const MachInst subq_pattern = 0x43c0153e;
 153     const MachInst intop_disp_mask = 0x001fe000;
 154     const int intop_disp_shift = 13;
 155
 156     if ((inst & mem_mask) == lda_pattern)
 157         disp = -sext<16>(inst & lda_disp_mask);
 158     else if ((inst & intop_mask) == addq_pattern)
 159         disp = -int((inst & intop_disp_mask) >> intop_disp_shift);
 160     else if ((inst & intop_mask) == subq_pattern)
 161         disp = int((inst & intop_disp_mask) >> intop_disp_shift);
 162     else
 163         return false;
 164
 165     return true;
 166 }
 167
 168 bool
 169 StackTrace::decodeSave(MachInst inst, int &reg, int &disp)
 170 {
 171     // lda $stq, disp($sp)
 172     //
 173     // Opcode<31:26> == 0x08
 174     // RA<25:21> == ?
 175     // RB<20:16> == 30
 176     // Disp<15:0>
 177     const MachInst stq_mask = 0xfc1f0000;
 178     const MachInst stq_pattern = 0xb41e0000;
 179     const MachInst stq_disp_mask = 0x0000ffff;
 180     const MachInst reg_mask = 0x03e00000;
 181     const int reg_shift = 21;
 182
 183     if ((inst & stq_mask) == stq_pattern) {
 184         reg = (inst & reg_mask) >> reg_shift;
 185         disp = sext<16>(inst & stq_disp_mask);
 186     } else {
 187         return false;
 188     }
 189
 190     return true;
 191 }
 192
 193 /*
 194  * Decode the function prologue for the function we're in, and note
 195  * which registers are stored where, and how large the stack frame is.
 196  */
 197 bool
 198 StackTrace::decodePrologue(Addr sp, Addr callpc, Addr func,
 199                            int &size, Addr &ra)
 200 {
 201     size = 0;
 202     ra = 0;
 203
 204     for (Addr pc = func; pc < callpc; pc += sizeof(MachInst)) {
 205         MachInst inst;
 206         CopyOut(tc, (uint8_t *)&inst, pc, sizeof(MachInst));
 207
 208         int reg, disp;
 209         if (decodeStack(inst, disp)) {
 210             if (size) {
 211                 return true;
 212             }
 213             size += disp;
 214         } else if (decodeSave(inst, reg, disp)) {
 215             if (!ra && reg == ReturnAddressReg) {
 216                 CopyOut(tc, (uint8_t *)&ra, sp + disp, sizeof(Addr));
 217                 if (!ra) {
 218                     return false;
 219                 }
 220             }
 221         }
 222     }
 223
 224     return true;
 225 }
 226
 227 #if TRACING_ON
 228 void
 229 StackTrace::dump()
 230 {
 231     panic("Stack trace dump not implemented.\n");
 232 }
 233 #endif