src/arch/mips/utility.cc

   1 /*
   2  * Copyright (c) 2003-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Korey Sewell
  29  */
  30
  31 #include "arch/mips/isa_traits.hh"
  32 #include "arch/mips/utility.hh"
  33 #include "arch/mips/constants.hh"
  34 #include "config/full_system.hh"
  35 #include "cpu/thread_context.hh"
  36 #include "cpu/static_inst.hh"
  37 #include "sim/serialize.hh"
  38 #include "base/bitfield.hh"
  39 #include "base/misc.hh"
  40
  41 using namespace MipsISA;
  42 using namespace std;
  43
  44 uint64_t
  45 MipsISA::fpConvert(ConvertType cvt_type, double fp_val)
  46 {
  47
  48     switch (cvt_type)
  49     {
  50       case SINGLE_TO_DOUBLE:
  51         {
  52             double sdouble_val = fp_val;
  53             void  *sdouble_ptr = &sdouble_val;
  54             uint64_t sdp_bits  = *(uint64_t *) sdouble_ptr;
  55             return sdp_bits;
  56         }
  57
  58       case SINGLE_TO_WORD:
  59         {
  60             int32_t sword_val  = (int32_t) fp_val;
  61             void  *sword_ptr   = &sword_val;
  62             uint64_t sword_bits= *(uint32_t *) sword_ptr;
  63             return sword_bits;
  64         }
  65
  66       case WORD_TO_SINGLE:
  67         {
  68             float wfloat_val   = fp_val;
  69             void  *wfloat_ptr  = &wfloat_val;
  70             uint64_t wfloat_bits = *(uint32_t *) wfloat_ptr;
  71             return wfloat_bits;
  72         }
  73
  74       case WORD_TO_DOUBLE:
  75         {
  76             double wdouble_val = fp_val;
  77             void  *wdouble_ptr = &wdouble_val;
  78             uint64_t wdp_bits  = *(uint64_t *) wdouble_ptr;
  79             return wdp_bits;
  80         }
  81
  82       default:
  83         panic("Invalid Floating Point Conversion Type (%d). See \"types.hh\" for List of Conversions\n",cvt_type);
  84         return 0;
  85     }
  86 }
  87
  88 double
  89 MipsISA::roundFP(double val, int digits)
  90 {
  91     double digit_offset = pow(10.0,digits);
  92     val = val * digit_offset;
  93     val = val + 0.5;
  94     val = floor(val);
  95     val = val / digit_offset;
  96     return val;
  97 }
  98
  99 double
 100 MipsISA::truncFP(double val)
 101 {
 102     int trunc_val = (int) val;
 103     return (double) trunc_val;
 104 }
 105
 106 bool
 107 MipsISA::getCondCode(uint32_t fcsr, int cc_idx)
 108 {
 109     int shift = (cc_idx == 0) ? 23 : cc_idx + 24;
 110     bool cc_val = (fcsr >> shift) & 0x00000001;
 111     return cc_val;
 112 }
 113
 114 uint32_t
 115 MipsISA::genCCVector(uint32_t fcsr, int cc_num, uint32_t cc_val)
 116 {
 117     int cc_idx = (cc_num == 0) ? 23 : cc_num + 24;
 118
 119     fcsr = bits(fcsr, 31, cc_idx + 1) << cc_idx + 1 |
 120            cc_val << cc_idx |
 121            bits(fcsr, cc_idx - 1, 0);
 122
 123     return fcsr;
 124 }
 125
 126 uint32_t
 127 MipsISA::genInvalidVector(uint32_t fcsr_bits)
 128 {
 129     //Set FCSR invalid in "flag" field
 130     int invalid_offset = Invalid + Flag_Field;
 131     fcsr_bits = fcsr_bits | (1 << invalid_offset);
 132
 133     //Set FCSR invalid in "cause" flag
 134     int cause_offset = Invalid + Cause_Field;
 135     fcsr_bits = fcsr_bits | (1 << cause_offset);
 136
 137     return fcsr_bits;
 138 }
 139
 140 bool
 141 MipsISA::isNan(void *val_ptr, int size)
 142 {
 143     switch (size)
 144     {
 145       case 32:
 146         {
 147             uint32_t val_bits = *(uint32_t *) val_ptr;
 148             return (bits(val_bits, 30, 23) == 0xFF);
 149         }
 150
 151       case 64:
 152         {
 153             uint64_t val_bits = *(uint64_t *) val_ptr;
 154             return (bits(val_bits, 62, 52) == 0x7FF);
 155         }
 156
 157       default:
 158         panic("Type unsupported. Size mismatch\n");
 159     }
 160 }
 161
 162
 163 bool
 164 MipsISA::isQnan(void *val_ptr, int size)
 165 {
 166     switch (size)
 167     {
 168       case 32:
 169         {
 170             uint32_t val_bits = *(uint32_t *) val_ptr;
 171             return (bits(val_bits, 30, 22) == 0x1FE);
 172         }
 173
 174       case 64:
 175         {
 176             uint64_t val_bits = *(uint64_t *) val_ptr;
 177             return (bits(val_bits, 62, 51) == 0xFFE);
 178         }
 179
 180       default:
 181         panic("Type unsupported. Size mismatch\n");
 182     }
 183 }
 184
 185 bool
 186 MipsISA::isSnan(void *val_ptr, int size)
 187 {
 188     switch (size)
 189     {
 190       case 32:
 191         {
 192             uint32_t val_bits = *(uint32_t *) val_ptr;
 193             return (bits(val_bits, 30, 22) == 0x1FF);
 194         }
 195
 196       case 64:
 197         {
 198             uint64_t val_bits = *(uint64_t *) val_ptr;
 199             return (bits(val_bits, 62, 51) == 0xFFF);
 200         }
 201
 202       default:
 203         panic("Type unsupported. Size mismatch\n");
 204     }
 205 }
 206
 207 void
 208 MipsISA::startupCPU(ThreadContext *tc, int cpuId)
 209 {
 210         tc->activate(0);
 211 }