src/arch/power/decoder.hh

   1 /*
   2  * Copyright (c) 2012 Google
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #ifndef __ARCH_POWER_DECODER_HH__
  32 #define __ARCH_POWER_DECODER_HH__
  33
  34 #include "arch/generic/decode_cache.hh"
  35 #include "arch/types.hh"
  36 #include "cpu/static_inst.hh"
  37
  38 namespace PowerISA
  39 {
  40
  41 class ISA;
  42 class Decoder
  43 {
  44   protected:
  45     // The extended machine instruction being generated
  46     ExtMachInst emi;
  47     bool instDone;
  48
  49   public:
  50     Decoder(ISA* isa = nullptr) : instDone(false)
  51     {
  52     }
  53
  54     void
  55     process()
  56     {
  57     }
  58
  59     void
  60     reset()
  61     {
  62         instDone = false;
  63     }
  64
  65     // Use this to give data to the predecoder. This should be used
  66     // when there is control flow.
  67     void
  68     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
  69     {
  70         emi = inst;
  71         instDone = true;
  72     }
  73
  74     // Use this to give data to the predecoder. This should be used
  75     // when instructions are executed in order.
  76     void
  77     moreBytes(MachInst machInst)
  78     {
  79         moreBytes(0, 0, machInst);
  80     }
  81
  82     bool
  83     needMoreBytes()
  84     {
  85         return true;
  86     }
  87
  88     bool
  89     instReady()
  90     {
  91         return instDone;
  92     }
  93
  94     void takeOverFrom(Decoder *old) {}
  95
  96   protected:
  97     /// A cache of decoded instruction objects.
  98     static GenericISA::BasicDecodeCache defaultCache;
  99
 100   public:
 101     StaticInstPtr decodeInst(ExtMachInst mach_inst);
 102
 103     /// Decode a machine instruction.
 104     /// @param mach_inst The binary instruction to decode.
 105     /// @retval A pointer to the corresponding StaticInst object.
 106     StaticInstPtr
 107     decode(ExtMachInst mach_inst, Addr addr)
 108     {
 109         return defaultCache.decode(this, mach_inst, addr);
 110     }
 111
 112     StaticInstPtr
 113     decode(PowerISA::PCState &nextPC)
 114     {
 115         if (!instDone)
 116             return NULL;
 117         instDone = false;
 118         return decode(emi, nextPC.instAddr());
 119     }
 120 };
 121
 122 } // namespace PowerISA
 123
 124 #endif // __ARCH_POWER_DECODER_HH__