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29 #ifndef __ARCH_POWER_DECODER_HH__
30 #define __ARCH_POWER_DECODER_HH__
32 #include "arch/generic/decode_cache.hh"
33 #include "arch/generic/decoder.hh"
34 #include "arch/power/types.hh"
35 #include "cpu/static_inst.hh"
41 class Decoder : public InstDecoder
44 // The extended machine instruction being generated
49 Decoder(ISA* isa = nullptr) : instDone(false)
64 // Use this to give data to the predecoder. This should be used
65 // when there is control flow.
67 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
73 // Use this to give data to the predecoder. This should be used
74 // when instructions are executed in order.
76 moreBytes(MachInst machInst)
78 moreBytes(0, 0, machInst);
93 void takeOverFrom(Decoder *old) {}
96 /// A cache of decoded instruction objects.
97 static GenericISA::BasicDecodeCache<Decoder, ExtMachInst> defaultCache;
100 StaticInstPtr decodeInst(ExtMachInst mach_inst);
102 /// Decode a machine instruction.
103 /// @param mach_inst The binary instruction to decode.
104 /// @retval A pointer to the corresponding StaticInst object.
106 decode(ExtMachInst mach_inst, Addr addr)
108 return defaultCache.decode(this, mach_inst, addr);
112 decode(PowerISA::PCState &nextPC)
117 return decode(emi, nextPC.instAddr());
121 } // namespace PowerISA
123 #endif // __ARCH_POWER_DECODER_HH__