src/arch/power/insts/branch.cc

   1 /*
   2  * Copyright (c) 2009 The University of Edinburgh
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include "arch/power/insts/branch.hh"
  30
  31 #include "base/loader/symtab.hh"
  32 #include "cpu/thread_context.hh"
  33
  34 using namespace PowerISA;
  35
  36 const std::string &
  37 PCDependentDisassembly::disassemble(
  38         Addr pc, const Loader::SymbolTable *symtab) const
  39 {
  40     if (!cachedDisassembly ||
  41         pc != cachedPC || symtab != cachedSymtab)
  42     {
  43         if (cachedDisassembly)
  44             delete cachedDisassembly;
  45
  46         cachedDisassembly =
  47             new std::string(generateDisassembly(pc, symtab));
  48         cachedPC = pc;
  49         cachedSymtab = symtab;
  50     }
  51
  52     return *cachedDisassembly;
  53 }
  54
  55 PowerISA::PCState
  56 BranchPCRel::branchTarget(const PowerISA::PCState &pc) const
  57 {
  58     return (uint32_t)(pc.pc() + disp);
  59 }
  60
  61 std::string
  62 BranchPCRel::generateDisassembly(
  63         Addr pc, const Loader::SymbolTable *symtab) const
  64 {
  65     std::stringstream ss;
  66
  67     ccprintf(ss, "%-10s ", mnemonic);
  68
  69     Addr target = pc + disp;
  70
  71     Loader::SymbolTable::const_iterator it;
  72     if (symtab && (it = symtab->find(target)) != symtab->end())
  73         ss << it->name;
  74     else
  75         ccprintf(ss, "%#x", target);
  76
  77     return ss.str();
  78 }
  79
  80 PowerISA::PCState
  81 BranchNonPCRel::branchTarget(const PowerISA::PCState &pc) const
  82 {
  83     return targetAddr;
  84 }
  85
  86 std::string
  87 BranchNonPCRel::generateDisassembly(
  88         Addr pc, const Loader::SymbolTable *symtab) const
  89 {
  90     std::stringstream ss;
  91
  92     ccprintf(ss, "%-10s ", mnemonic);
  93
  94     Loader::SymbolTable::const_iterator it;
  95     if (symtab && (it = symtab->find(targetAddr)) != symtab->end())
  96         ss << it->name;
  97     else
  98         ccprintf(ss, "%#x", targetAddr);
  99
 100     return ss.str();
 101 }
 102
 103 PowerISA::PCState
 104 BranchPCRelCond::branchTarget(const PowerISA::PCState &pc) const
 105 {
 106     return (uint32_t)(pc.pc() + disp);
 107 }
 108
 109 std::string
 110 BranchPCRelCond::generateDisassembly(
 111         Addr pc, const Loader::SymbolTable *symtab) const
 112 {
 113     std::stringstream ss;
 114
 115     ccprintf(ss, "%-10s ", mnemonic);
 116
 117     ss << bo << ", " << bi << ", ";
 118
 119     Addr target = pc + disp;
 120
 121     Loader::SymbolTable::const_iterator it;
 122     if (symtab && (it = symtab->find(target)) != symtab->end())
 123         ss << it->name;
 124     else
 125         ccprintf(ss, "%#x", target);
 126
 127     return ss.str();
 128 }
 129
 130 PowerISA::PCState
 131 BranchNonPCRelCond::branchTarget(const PowerISA::PCState &pc) const
 132 {
 133     return targetAddr;
 134 }
 135
 136 std::string
 137 BranchNonPCRelCond::generateDisassembly(
 138         Addr pc, const Loader::SymbolTable *symtab) const
 139 {
 140     std::stringstream ss;
 141
 142     ccprintf(ss, "%-10s ", mnemonic);
 143
 144     ss << bo << ", " << bi << ", ";
 145
 146     Loader::SymbolTable::const_iterator it;
 147     if (symtab && (it = symtab->find(targetAddr)) != symtab->end())
 148         ss << it->name;
 149     else
 150         ccprintf(ss, "%#x", targetAddr);
 151
 152     return ss.str();
 153 }
 154
 155 PowerISA::PCState
 156 BranchRegCond::branchTarget(ThreadContext *tc) const
 157 {
 158     uint32_t regVal = tc->readIntReg(_srcRegIdx[_numSrcRegs - 1].index());
 159     return regVal & 0xfffffffc;
 160 }
 161
 162 std::string
 163 BranchRegCond::generateDisassembly(
 164         Addr pc, const Loader::SymbolTable *symtab) const
 165 {
 166     std::stringstream ss;
 167
 168     ccprintf(ss, "%-10s ", mnemonic);
 169
 170     ss << bo << ", " << bi << ", ";
 171
 172     return ss.str();
 173 }