f800ae3d5ae197285e3e06e9f5169c8eeaf7a075
[gem5.git] / src / arch / power / insts / mem.hh
1 /*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __ARCH_POWER_MEM_HH__
30 #define __ARCH_POWER_MEM_HH__
31
32 #include "arch/power/insts/static_inst.hh"
33
34 namespace PowerISA
35 {
36
37 /**
38 * Base class for memory operations.
39 */
40 class MemOp : public PowerStaticInst
41 {
42 protected:
43
44 /// Memory request flags. See mem_req_base.hh.
45 unsigned memAccessFlags;
46
47 /// Constructor
48 MemOp(const char *mnem, MachInst _machInst, OpClass __opClass)
49 : PowerStaticInst(mnem, _machInst, __opClass),
50 memAccessFlags(0)
51 {
52 }
53
54 std::string generateDisassembly(
55 Addr pc, const Loader::SymbolTable *symtab) const override;
56 };
57
58
59 /**
60 * Class for memory operations with displacement.
61 */
62 class MemDispOp : public MemOp
63 {
64 protected:
65
66 int16_t disp;
67
68 /// Constructor
69 MemDispOp(const char *mnem, MachInst _machInst, OpClass __opClass)
70 : MemOp(mnem, _machInst, __opClass), disp(machInst.d)
71 {
72 }
73
74 std::string generateDisassembly(
75 Addr pc, const Loader::SymbolTable *symtab) const override;
76 };
77
78 /**
79 * Class for memory operations with shifted displacement.
80 */
81 class MemDispShiftOp : public MemOp
82 {
83 protected:
84
85 int16_t disp;
86
87 /// Constructor
88 MemDispShiftOp(const char *mnem, MachInst _machInst, OpClass __opClass)
89 : MemOp(mnem, _machInst, __opClass),
90 disp(sext<14>(machInst.ds))
91 {
92 }
93
94 std::string generateDisassembly(
95 Addr pc, const Loader::SymbolTable *symtab) const override;
96 };
97
98
99 /**
100 * Class for memory operations with register indexed addressing.
101 */
102 class MemIndexOp : public MemOp
103 {
104 protected:
105
106 /// Constructor
107 MemIndexOp(const char *mnem, MachInst _machInst, OpClass __opClass)
108 : MemOp(mnem, _machInst, __opClass)
109 {
110 }
111
112 std::string generateDisassembly(
113 Addr pc, const Loader::SymbolTable *symtab) const override;
114 };
115
116 } // namespace PowerISA
117
118 #endif //__ARCH_POWER_INSTS_MEM_HH__