b3e7e60733961b2221449e51d82c2a030039845f
[gem5.git] / src / arch / power / isa / formats / unimp.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2007-2008 The Florida State University
4 // Copyright (c) 2009 The University of Edinburgh
5 // All rights reserved.
6 //
7 // Redistribution and use in source and binary forms, with or without
8 // modification, are permitted provided that the following conditions are
9 // met: redistributions of source code must retain the above copyright
10 // notice, this list of conditions and the following disclaimer;
11 // redistributions in binary form must reproduce the above copyright
12 // notice, this list of conditions and the following disclaimer in the
13 // documentation and/or other materials provided with the distribution;
14 // neither the name of the copyright holders nor the names of its
15 // contributors may be used to endorse or promote products derived from
16 // this software without specific prior written permission.
17 //
18 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 //
30 // Authors: Stephen Hines
31 // Timothy M. Jones
32
33 ////////////////////////////////////////////////////////////////////
34 //
35 // Unimplemented instructions
36 //
37
38 output header {{
39 /**
40 * Static instruction class for unimplemented instructions that
41 * cause simulator termination. Note that these are recognized
42 * (legal) instructions that the simulator does not support; the
43 * 'Unknown' class is used for unrecognized/illegal instructions.
44 * This is a leaf class.
45 */
46 class FailUnimplemented : public PowerStaticInst
47 {
48 public:
49 /// Constructor
50 FailUnimplemented(const char *_mnemonic, MachInst _machInst)
51 : PowerStaticInst(_mnemonic, _machInst, No_OpClass)
52 {
53 // don't call execute() (which panics) if we're on a
54 // speculative path
55 flags[IsNonSpeculative] = true;
56 }
57
58 %(BasicExecDeclare)s
59
60 std::string
61 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
62 };
63
64 /**
65 * Base class for unimplemented instructions that cause a warning
66 * to be printed (but do not terminate simulation). This
67 * implementation is a little screwy in that it will print a
68 * warning for each instance of a particular unimplemented machine
69 * instruction, not just for each unimplemented opcode. Should
70 * probably make the 'warned' flag a static member of the derived
71 * class.
72 */
73 class WarnUnimplemented : public PowerStaticInst
74 {
75 private:
76 /// Have we warned on this instruction yet?
77 mutable bool warned;
78
79 public:
80 /// Constructor
81 WarnUnimplemented(const char *_mnemonic, MachInst _machInst)
82 : PowerStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
83 {
84 // don't call execute() (which panics) if we're on a
85 // speculative path
86 flags[IsNonSpeculative] = true;
87 }
88
89 %(BasicExecDeclare)s
90
91 std::string
92 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
93 };
94 }};
95
96 output decoder {{
97 std::string
98 FailUnimplemented::generateDisassembly(Addr pc,
99 const SymbolTable *symtab) const
100 {
101 return csprintf("%-10s (unimplemented)", mnemonic);
102 }
103
104 std::string
105 WarnUnimplemented::generateDisassembly(Addr pc,
106 const SymbolTable *symtab) const
107 {
108 return csprintf("%-10s (unimplemented)", mnemonic);
109 }
110 }};
111
112 output exec {{
113 Fault
114 FailUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
115 Trace::InstRecord *traceData) const
116 {
117 panic("attempt to execute unimplemented instruction '%s' "
118 "(inst 0x%08x, opcode 0x%x, binary:%s)", mnemonic, machInst, OPCODE,
119 inst2string(machInst));
120 return new UnimplementedOpcodeFault;
121 }
122
123 Fault
124 WarnUnimplemented::execute(CPU_EXEC_CONTEXT *xc,
125 Trace::InstRecord *traceData) const
126 {
127 if (!warned) {
128 warn("\tinstruction '%s' unimplemented\n", mnemonic);
129 warned = true;
130 }
131
132 return NoFault;
133 }
134 }};
135
136
137 def format FailUnimpl() {{
138 iop = InstObjParams(name, 'FailUnimplemented')
139 decode_block = BasicDecodeWithMnemonic.subst(iop)
140 }};
141
142 def format WarnUnimpl() {{
143 iop = InstObjParams(name, 'WarnUnimplemented')
144 decode_block = BasicDecodeWithMnemonic.subst(iop)
145 }};
146