src/arch/power/isa/formats/unknown.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2007-2008 The Florida State University
   4 // Copyright (c) 2009 The University of Edinburgh
   5 // All rights reserved.
   6 //
   7 // Redistribution and use in source and binary forms, with or without
   8 // modification, are permitted provided that the following conditions are
   9 // met: redistributions of source code must retain the above copyright
  10 // notice, this list of conditions and the following disclaimer;
  11 // redistributions in binary form must reproduce the above copyright
  12 // notice, this list of conditions and the following disclaimer in the
  13 // documentation and/or other materials provided with the distribution;
  14 // neither the name of the copyright holders nor the names of its
  15 // contributors may be used to endorse or promote products derived from
  16 // this software without specific prior written permission.
  17 //
  18 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29 //
  30 // Authors: Stephen Hines
  31 //          Timothy M. Jones
  32
  33 ////////////////////////////////////////////////////////////////////
  34 //
  35 // Unknown instructions
  36 //
  37
  38 output header {{
  39     /**
  40      * Static instruction class for unknown (illegal) instructions.
  41      * These cause simulator termination if they are executed in a
  42      * non-speculative mode.  This is a leaf class.
  43      */
  44     class Unknown : public PowerStaticInst
  45     {
  46       public:
  47         /// Constructor
  48         Unknown(ExtMachInst _machInst)
  49             : PowerStaticInst("unknown", _machInst, No_OpClass)
  50         {
  51             // don't call execute() (which panics) if we're on a
  52             // speculative path
  53             flags[IsNonSpeculative] = true;
  54         }
  55
  56         %(BasicExecDeclare)s
  57
  58         std::string
  59         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
  60     };
  61 }};
  62
  63 output decoder {{
  64     std::string
  65     Unknown::generateDisassembly(Addr pc, const SymbolTable *symtab) const
  66     {
  67         return csprintf("%-10s (inst 0x%x, opcode 0x%x, binary:%s)",
  68                         "unknown", machInst, OPCODE, inst2string(machInst));
  69     }
  70 }};
  71
  72 output exec {{
  73     Fault
  74     Unknown::execute(%(CPU_exec_context)s *xc,
  75                      Trace::InstRecord *traceData) const
  76     {
  77         panic("attempt to execute unknown instruction at %#x"
  78               "(inst 0x%08x, opcode 0x%x, binary: %s)",
  79               xc->readPC(), machInst, OPCODE, inst2string(machInst));
  80         return new UnimplementedOpcodeFault;
  81     }
  82 }};
  83
  84 def format Unknown() {{
  85     decode_block = 'return new Unknown(machInst);\n'
  86 }};
  87