src/arch/power/isa_traits.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * Copyright (c) 2007-2008 The Florida State University
   4  * Copyright (c) 2009 The University of Edinburgh
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are
   9  * met: redistributions of source code must retain the above copyright
  10  * notice, this list of conditions and the following disclaimer;
  11  * redistributions in binary form must reproduce the above copyright
  12  * notice, this list of conditions and the following disclaimer in the
  13  * documentation and/or other materials provided with the distribution;
  14  * neither the name of the copyright holders nor the names of its
  15  * contributors may be used to endorse or promote products derived from
  16  * this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #ifndef __ARCH_POWER_ISA_TRAITS_HH__
  32 #define __ARCH_POWER_ISA_TRAITS_HH__
  33
  34 #include "base/types.hh"
  35 #include "cpu/static_inst_fwd.hh"
  36
  37 namespace LittleEndianGuest {}
  38
  39 namespace PowerISA
  40 {
  41
  42 const ByteOrder GuestByteOrder = ByteOrder::little;
  43 using namespace LittleEndianGuest;
  44
  45 StaticInstPtr decodeInst(ExtMachInst);
  46
  47 const Addr PageShift = 12;
  48 const Addr PageBytes = ULL(1) << PageShift;
  49 const Addr Page_Mask = ~(PageBytes - 1);
  50 const Addr PageOffset = PageBytes - 1;
  51
  52 const Addr PteShift = 3;
  53 const Addr NPtePageShift = PageShift - PteShift;
  54 const Addr NPtePage = ULL(1) << NPtePageShift;
  55 const Addr PteMask = NPtePage - 1;
  56
  57 const int MachineBytes = 8;
  58
  59 // Memory accesses can be unaligned
  60 const bool HasUnalignedMemAcc = true;
  61
  62 const bool CurThreadInfoImplemented = false;
  63 const int CurThreadInfoReg = -1;
  64
  65 } // namespace PowerISA
  66
  67 #endif // __ARCH_POWER_ISA_TRAITS_HH__