src/arch/power/registers.hh

   1 /*
   2  * Copyright (c) 2009 The University of Edinburgh
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Timothy M. Jones
  29  */
  30
  31 #ifndef __ARCH_POWER_REGISTERS_HH__
  32 #define __ARCH_POWER_REGISTERS_HH__
  33
  34 #include "arch/generic/vec_pred_reg.hh"
  35 #include "arch/generic/vec_reg.hh"
  36 #include "arch/power/generated/max_inst_regs.hh"
  37 #include "arch/power/miscregs.hh"
  38 #include "base/types.hh"
  39
  40 namespace PowerISA {
  41
  42 using PowerISAInst::MaxInstSrcRegs;
  43 using PowerISAInst::MaxInstDestRegs;
  44
  45 // Power writes a misc register outside of the isa parser, so it can't
  46 // be detected by it. Manually add it here.
  47 const int MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1;
  48
  49 typedef RegVal IntReg;
  50
  51 // Floating point register file entry type
  52 typedef RegVal FloatRegBits;
  53 typedef RegVal MiscReg;
  54
  55 // dummy typedef since we don't have CC regs
  56 typedef uint8_t CCReg;
  57
  58 // Not applicable to Power
  59 using VecElem = ::DummyVecElem;
  60 using VecReg = ::DummyVecReg;
  61 using ConstVecReg = ::DummyConstVecReg;
  62 using VecRegContainer = ::DummyVecRegContainer;
  63 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
  64 constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
  65
  66 // Not applicable to Power
  67 using VecPredReg = ::DummyVecPredReg;
  68 using ConstVecPredReg = ::DummyConstVecPredReg;
  69 using VecPredRegContainer = ::DummyVecPredRegContainer;
  70 constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
  71 constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
  72
  73 // Constants Related to the number of registers
  74 const int NumIntArchRegs = 32;
  75
  76 // CR, XER, LR, CTR, FPSCR, RSV, RSV-LEN, RSV-ADDR
  77 // and zero register, which doesn't actually exist but needs a number
  78 const int NumIntSpecialRegs = 9;
  79 const int NumFloatArchRegs = 32;
  80 const int NumFloatSpecialRegs = 0;
  81 const int NumInternalProcRegs = 0;
  82
  83 const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs;
  84 const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
  85 const int NumVecRegs = 1;  // Not applicable to Power
  86                            // (1 to prevent warnings)
  87 const int NumVecPredRegs = 1;  // Not applicable to Power
  88                                // (1 to prevent warnings)
  89 const int NumCCRegs = 0;
  90 const int NumMiscRegs = NUM_MISCREGS;
  91
  92 // Semantically meaningful register indices
  93 const int ReturnValueReg = 3;
  94 const int ArgumentReg0 = 3;
  95 const int ArgumentReg1 = 4;
  96 const int ArgumentReg2 = 5;
  97 const int ArgumentReg3 = 6;
  98 const int ArgumentReg4 = 7;
  99 const int FramePointerReg = 31;
 100 const int StackPointerReg = 1;
 101
 102 // There isn't one in Power, but we need to define one somewhere
 103 const int ZeroReg = NumIntRegs - 1;
 104
 105 const int SyscallNumReg = 0;
 106 const int SyscallPseudoReturnReg = 3;
 107 const int SyscallSuccessReg = 3;
 108
 109 enum MiscIntRegNums {
 110     INTREG_CR = NumIntArchRegs,
 111     INTREG_XER,
 112     INTREG_LR,
 113     INTREG_CTR,
 114     INTREG_FPSCR,
 115     INTREG_RSV,
 116     INTREG_RSV_LEN,
 117     INTREG_RSV_ADDR
 118 };
 119
 120 } // namespace PowerISA
 121
 122 #endif // __ARCH_POWER_REGISTERS_HH__