src/arch/power/registers.hh

   1 /*
   2  * Copyright (c) 2009 The University of Edinburgh
   3  * Copyright (c) 2021 IBM Corporation
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  */
  29
  30 #ifndef __ARCH_POWER_REGISTERS_HH__
  31 #define __ARCH_POWER_REGISTERS_HH__
  32
  33 #include "arch/generic/vec_pred_reg.hh"
  34 #include "arch/generic/vec_reg.hh"
  35 #include "arch/power/generated/max_inst_regs.hh"
  36 #include "arch/power/miscregs.hh"
  37 #include "base/types.hh"
  38
  39 namespace PowerISA {
  40
  41 using PowerISAInst::MaxInstSrcRegs;
  42 using PowerISAInst::MaxInstDestRegs;
  43
  44 // Power writes a misc register outside of the isa parser, so it can't
  45 // be detected by it. Manually add it here.
  46 const int MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1;
  47
  48 // Not applicable to Power
  49 using VecElem = ::DummyVecElem;
  50 using VecReg = ::DummyVecReg;
  51 using ConstVecReg = ::DummyConstVecReg;
  52 using VecRegContainer = ::DummyVecRegContainer;
  53 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
  54 constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
  55
  56 // Not applicable to Power
  57 using VecPredReg = ::DummyVecPredReg;
  58 using ConstVecPredReg = ::DummyConstVecPredReg;
  59 using VecPredRegContainer = ::DummyVecPredRegContainer;
  60 constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
  61 constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
  62
  63 // Constants Related to the number of registers
  64 const int NumIntArchRegs = 32;
  65
  66 // RSV, RSV-LEN, RSV-ADDR
  67 // and zero register, which doesn't actually exist but needs a number
  68 const int NumIntSpecialRegs = 4;
  69 const int NumFloatArchRegs = 32;
  70
  71 const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs;
  72 const int NumFloatRegs = NumFloatArchRegs;
  73 const int NumVecRegs = 1;  // Not applicable to Power
  74                            // (1 to prevent warnings)
  75 const int NumVecPredRegs = 1;  // Not applicable to Power
  76                                // (1 to prevent warnings)
  77 const int NumCCRegs = 0;
  78 const int NumMiscRegs = NUM_MISCREGS;
  79
  80 // Semantically meaningful register indices
  81 const int ReturnValueReg = 3;
  82 const int ArgumentReg0 = 3;
  83 const int ArgumentReg1 = 4;
  84 const int ArgumentReg2 = 5;
  85 const int ArgumentReg3 = 6;
  86 const int ArgumentReg4 = 7;
  87 const int ArgumentReg5 = 8;
  88 const int StackPointerReg = 1;
  89 const int TOCPointerReg = 2;
  90
  91 // There isn't one in Power, but we need to define one somewhere
  92 const int ZeroReg = NumIntRegs - 1;
  93
  94 enum MiscIntRegNums {
  95     INTREG_RSV = NumIntArchRegs,
  96     INTREG_RSV_LEN,
  97     INTREG_RSV_ADDR
  98 };
  99
 100 } // namespace PowerISA
 101
 102 #endif // __ARCH_POWER_REGISTERS_HH__