src/arch/power/stacktrace.hh

   1 /*
   2  * Copyright (c) 2005 The Regents of The University of Michigan
   3  * Copyright (c) 2007-2008 The Florida State University
   4  * Copyright (c) 2009 The University of Edinburgh
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are
   9  * met: redistributions of source code must retain the above copyright
  10  * notice, this list of conditions and the following disclaimer;
  11  * redistributions in binary form must reproduce the above copyright
  12  * notice, this list of conditions and the following disclaimer in the
  13  * documentation and/or other materials provided with the distribution;
  14  * neither the name of the copyright holders nor the names of its
  15  * contributors may be used to endorse or promote products derived from
  16  * this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  *
  30  * Authors: Ali Saidi
  31  *          Stephen Hines
  32  *          Timothy M. Jones
  33  */
  34
  35 #ifndef __ARCH_POWER_STACKTRACE_HH__
  36 #define __ARCH_POWER_STACKTRACE_HH__
  37
  38 #include "base/trace.hh"
  39 #include "cpu/static_inst.hh"
  40
  41 class ThreadContext;
  42 class StackTrace;
  43
  44 namespace PowerISA
  45 {
  46
  47 class ProcessInfo
  48 {
  49   private:
  50     ThreadContext *tc;
  51
  52     int thread_info_size;
  53     int task_struct_size;
  54     int task_off;
  55     int pid_off;
  56     int name_off;
  57
  58   public:
  59     ProcessInfo(ThreadContext *_tc);
  60
  61     Addr task(Addr ksp) const;
  62     int pid(Addr ksp) const;
  63     std::string name(Addr ksp) const;
  64 };
  65
  66 class StackTrace
  67 {
  68   protected:
  69     typedef TheISA::MachInst MachInst;
  70   private:
  71     ThreadContext *tc;
  72     std::vector<Addr> stack;
  73
  74   private:
  75     bool isEntry(Addr addr);
  76     bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra);
  77     bool decodeSave(MachInst inst, int &reg, int &disp);
  78     bool decodeStack(MachInst inst, int &disp);
  79
  80     void trace(ThreadContext *tc, bool is_call);
  81
  82   public:
  83     StackTrace();
  84     StackTrace(ThreadContext *tc, StaticInstPtr inst);
  85     ~StackTrace();
  86
  87     void
  88     clear()
  89     {
  90         tc = 0;
  91         stack.clear();
  92     }
  93
  94     bool
  95     valid() const
  96     {
  97         return tc != NULL;
  98     }
  99
 100     bool trace(ThreadContext *tc, StaticInstPtr inst);
 101
 102   public:
 103     const std::vector<Addr> &
 104     getstack() const
 105     {
 106         return stack;
 107     }
 108
 109     static const int user = 1;
 110     static const int console = 2;
 111     static const int unknown = 3;
 112
 113 #if TRACING_ON
 114   private:
 115     void dump();
 116
 117   public:
 118     void
 119     dprintf()
 120     {
 121         if (DTRACE(Stack))
 122             dump();
 123     }
 124 #else
 125   public:
 126     void
 127     dprintf()
 128     {
 129     }
 130 #endif
 131 };
 132
 133 inline bool
 134 StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
 135 {
 136     if (!inst->isCall() && !inst->isReturn())
 137         return false;
 138
 139     if (valid())
 140         clear();
 141
 142     trace(tc, !inst->isReturn());
 143     return true;
 144 }
 145
 146 } // PowerISA namespace
 147
 148 #endif // __ARCH_POWER_STACKTRACE_HH__