src/arch/power/utility.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * Copyright (c) 2007-2008 The Florida State University
   4  * Copyright (c) 2009 The University of Edinburgh
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are
   9  * met: redistributions of source code must retain the above copyright
  10  * notice, this list of conditions and the following disclaimer;
  11  * redistributions in binary form must reproduce the above copyright
  12  * notice, this list of conditions and the following disclaimer in the
  13  * documentation and/or other materials provided with the distribution;
  14  * neither the name of the copyright holders nor the names of its
  15  * contributors may be used to endorse or promote products derived from
  16  * this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  *
  30  * Authors: Korey Sewell
  31  *          Stephen Hines
  32  *          Timothy M. Jones
  33  */
  34
  35 #ifndef __ARCH_POWER_UTILITY_HH__
  36 #define __ARCH_POWER_UTILITY_HH__
  37
  38 #include "arch/power/miscregs.hh"
  39 #include "arch/power/types.hh"
  40 #include "base/hashmap.hh"
  41 #include "base/types.hh"
  42 #include "cpu/thread_context.hh"
  43
  44 namespace __hash_namespace {
  45
  46 template<>
  47 struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> {
  48     size_t operator()(const PowerISA::ExtMachInst &emi) const {
  49         return hash<uint32_t>::operator()((uint32_t)emi);
  50     };
  51 };
  52
  53 } // __hash_namespace namespace
  54
  55 namespace PowerISA {
  56
  57 /**
  58  * Function to ensure ISA semantics about 0 registers.
  59  * @param tc The thread context.
  60  */
  61 template <class TC>
  62 void zeroRegisters(TC *tc);
  63
  64 // Instruction address compression hooks
  65 static inline Addr
  66 realPCToFetchPC(const Addr &addr)
  67 {
  68     return addr;
  69 }
  70
  71 static inline Addr
  72 fetchPCToRealPC(const Addr &addr)
  73 {
  74     return addr;
  75 }
  76
  77 // the size of "fetched" instructions
  78 static inline size_t
  79 fetchInstSize()
  80 {
  81     return sizeof(MachInst);
  82 }
  83
  84 static inline MachInst
  85 makeRegisterCopy(int dest, int src)
  86 {
  87     panic("makeRegisterCopy not implemented");
  88     return 0;
  89 }
  90
  91 inline void
  92 startupCPU(ThreadContext *tc, int cpuId)
  93 {
  94     tc->activate(0);
  95 }
  96
  97 template <class XC>
  98 Fault
  99 checkFpEnableFault(XC *xc)
 100 {
 101     return NoFault;
 102 }
 103
 104 static inline void
 105 copyRegs(ThreadContext *src, ThreadContext *dest)
 106 {
 107     panic("Copy Regs Not Implemented Yet\n");
 108 }
 109
 110 static inline void
 111 copyMiscRegs(ThreadContext *src, ThreadContext *dest)
 112 {
 113     panic("Copy Misc. Regs Not Implemented Yet\n");
 114 }
 115
 116 } // PowerISA namespace
 117
 118 #endif // __ARCH_POWER_UTILITY_HH__