src/arch/riscv/decoder.cc

   1 /*
   2  * Copyright (c) 2012 Google
   3  * Copyright (c) The University of Virginia
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  * Authors: Gabe Black
  30  *          Alec Roelke
  31  */
  32
  33 #include "arch/riscv/decoder.hh"
  34 #include "arch/riscv/types.hh"
  35 #include "debug/Decode.hh"
  36
  37 namespace RiscvISA
  38 {
  39
  40 static const MachInst LowerBitMask = (1 << sizeof(MachInst) * 4) - 1;
  41 static const MachInst UpperBitMask = LowerBitMask << sizeof(MachInst) * 4;
  42
  43 void Decoder::reset()
  44 {
  45     aligned = true;
  46     mid = false;
  47     more = true;
  48     emi = NoopMachInst;
  49     instDone = false;
  50 }
  51
  52 void
  53 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
  54 {
  55     DPRINTF(Decode, "Requesting bytes 0x%08x from address %#x\n", inst,
  56             fetchPC);
  57
  58     bool aligned = pc.pc() % sizeof(MachInst) == 0;
  59     if (aligned) {
  60         emi = inst;
  61         if (compressed(emi))
  62             emi &= LowerBitMask;
  63         more = !compressed(emi);
  64         instDone = true;
  65     } else {
  66         if (mid) {
  67             assert((emi & UpperBitMask) == 0);
  68             emi |= (inst & LowerBitMask) << sizeof(MachInst)*4;
  69             mid = false;
  70             more = false;
  71             instDone = true;
  72         } else {
  73             emi = (inst & UpperBitMask) >> sizeof(MachInst)*4;
  74             mid = !compressed(emi);
  75             more = true;
  76             instDone = compressed(emi);
  77         }
  78     }
  79 }
  80
  81 StaticInstPtr
  82 Decoder::decode(ExtMachInst mach_inst, Addr addr)
  83 {
  84     DPRINTF(Decode, "Decoding instruction 0x%08x at address %#x\n",
  85             mach_inst, addr);
  86     if (instMap.find(mach_inst) != instMap.end())
  87         return instMap[mach_inst];
  88     else {
  89         StaticInstPtr si = decodeInst(mach_inst);
  90         instMap[mach_inst] = si;
  91         return si;
  92     }
  93 }
  94
  95 StaticInstPtr
  96 Decoder::decode(RiscvISA::PCState &nextPC)
  97 {
  98     if (!instDone)
  99         return nullptr;
 100     instDone = false;
 101
 102     if (compressed(emi)) {
 103         nextPC.npc(nextPC.instAddr() + sizeof(MachInst) / 2);
 104     } else {
 105         nextPC.npc(nextPC.instAddr() + sizeof(MachInst));
 106     }
 107
 108     return decode(emi, nextPC.instAddr());
 109 }
 110
 111 }